Extending achievable duty cycle range in DC/DC forward converter with active clamp reset

1. A system for controlling a DC/DC forward converter having a transformer with primary and secondary windings, a reset switch, and a first switch coupled to the primary winding of the transformer, the system comprising:

a PWM control circuit responsive to an output signal of the converter for producing a PWM signal to control switching of the reset switch and the first switch,

a period of the PWM signal including an on-time interval for enabling transfer of power via the transformer when the first switch is on, and a reset time interval for enabling reset of the transformer when the reset switch is on,

a maximum value of the on-time interval being pre-set to provide sufficient time for the reset,

the reset switch being turned off when the PWM signal goes from a first level to a second level,

a first delay period being set between time when the reset switch turns off and time when the first switch turns on; and

a first delay control circuit for reducing the first delay period when the on-time interval approaches the maximum value.

2. The system of claim 1 , further comprising a second switch coupled to the secondary winding of the transformer, wherein a second delay period shorter than the first delay period being set between time when the reset switch turns off and time when the second switch turns on, the system further comprising a second delay control circuit for reducing the second delay period when the on-time interval approaches the maximum value.

3. The system of claim 2 , wherein the first delay control circuit is configured to determine a difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the first delay period to a value of (m×Δt) if the value of (m×Δt) is less the first delay period, where m is a constant value selected to provide stability of converter operations.

4. The system of claim 3 , wherein the second delay control circuit is configured to determine the difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and to reduce the second delay period to a value of (k×Δt), if the value of (k×Δt) is less than the second delay period, where k is a constant value selected to provide stability of converter operations, and m exceeds k.

5. The system of claim 2 , wherein the first delay control circuit includes a first timing capacitor, a first current source for producing a first value of current representing the first delay period, and a second current source for producing a second value of current proportional to the first value.

6. The system of claim 5 , wherein the first timing capacitor being coupled to the first and second current sources so as to being charged with current of the first value and discharged with current of the second value.

7. The system of claim 6 , wherein the first delay control circuit further includes a comparator for comparing voltage at the first timing capacitor with a threshold value to control charging of the first timing capacitor.

8. The system of claim 7 , wherein the first timing capacitor is disconnected from the first current source when the voltage at the first timing capacitor reaches the threshold value.

9. The system of claim 8 , wherein the first timing capacitor is connected to the first current source for charging when the PWM signal goes to the second level.

10. The system of claim 9 , wherein the first timing capacitor is connected to the second current source for discharging when the PWM signal goes to the first level.

11. The system of claim 10 , wherein the first timing capacitor is disconnected from the second current source in response to the maximum value of the on-time interval.

12. The system of claim 5 , wherein the second delay control circuit includes a second timing capacitor, a third current source for producing a third value of current representing the second delay period, and a fourth current source for producing a fourth value of current proportional to the third value, the fourth value is higher than the second value.

13. The system of claim 12 , wherein the second timing capacitor being coupled to the third and fourth current sources so as to being charged with current of the third value and discharged with current of the fourth value.

14. A method of extending a duty cycle range in a DC/DC forward converter having a transformer with primary and secondary windings, a reset switch, and a first switch coupled to the primary winding of the transformer, the method comprising the steps of:

based on an output signal of the converter, producing a PWM signal to control switching of the reset switch and the first switch;

a period of the PWM signal including an on-time interval for enabling transfer of power via the transformer when the first switch is on, and a reset time interval for enabling reset of the transformer when the reset switch is on,

a maximum value of the on-time interval being pre-set to provide sufficient time for the reset,

the reset switch being turned off when the PWM signal goes from a first level to a second level,

a first delay period being set to delay turn-on of the first switch after the reset switch turns off, thereby reducing a duty cycle of the converter; and

reducing the first delay time when the on-time interval approaches the maximum value, so as to extend the duty cycle.

15. The method of claim 14 , wherein the converter further includes a second switch coupled to the secondary winding of the transformer, and a second delay period shorter than the first delay period being set to delay turn-on of the second switch after the reset switch turns off, the method further comprising a step of reducing the second delay time when the on-time interval approaches the maximum value, so as to further extend the duty cycle.

16. The method of claim 15 , wherein the step of reducing the first delay period comprises:

in a first switching cycle of the converter, determining a difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and

in a second switching cycle of the converter carried out after the first switching cycle, reducing the first delay period to a value of (m×Δt) if the value of (m×Δt) is less the first delay period, where m is a constant value selected to provide stability of converter operations.

17. The method of claim 16 , wherein the step of reducing the second delay period comprises:

in a first switching cycle of the converter, determining the difference Δt between duration of the on-time interval and the maximum value of the on-time interval, and

in a second switching cycle of the converter carried out after the first switching cycle, reducing the second delay period to a value of (k×Δt), if the value of (k×Δt) is less than the second delay period, where k is a constant value selected to provide stability of converter operations, and m exceeds k.