IP Library Granted Patent US 8,289,067
Granted Patent B2
US 8,289,067 · App. 12/880,908 · Granted Oct 16, 2012

Method and system for bandwidth enhancement using hybrid inductors

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Quick Facts
Patent No.
US 8,289,067
App. No.
12/880,908
Granted
Oct 16, 2012
Kind
B2
Abstract

A method and system for bandwidth enhancement using hybrid inductors are disclosed and may include providing an electrical impedance that increases with frequency via hybrid inductors comprising a transistor, a capacitor, an inductor, and a resistor. A first terminal of the hybrid inductors may comprise a first terminal of the transistor. A second terminal of the transistor may be coupled to a first terminal of the resistor and a first terminal of the capacitor. A second terminal of the resistor may comprise a second terminal of the hybrid inductors. A third terminal of the transistor may be coupled to a first terminal of an inductor, and a second terminal of the inductor may be coupled to a second terminal of the capacitor. The hybrid inductors may be configured by varying transconductance, resistance, and/or capacitance and may be utilized as an amplifier load.

Claims (98)

1. A method for processing signals, the method comprising:

in an electrical circuit, providing an electrical impedance that increases with frequency utilizing one or more hybrid inductors comprising a transistor coupled to a capacitor, an inductor, and a resistor, wherein:

a first terminal of said one or more hybrid inductors comprises a first terminal of said transistor;

a second terminal of said transistor is coupled to a first terminal of said resistor and a first terminal of said capacitor;

a second terminal of said resistor comprises a second terminal of said one or more hybrid inductors;

a third terminal of said transistor is coupled to a first terminal of an inductor; and

a second terminal of said inductor is coupled to a second terminal of said capacitor and comprises a third terminal of said one or more hybrid inductors.

2. The method according to claim 1 , comprising configuring an impedance of said one or more hybrid inductors by varying a transconductance of said transistor.

3. The method according to claim 1 , comprising configuring an impedance of said one or more hybrid inductors by varying a resistance of said resistor.

4. The method according to claim 1 , comprising configuring an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

5. The method according to claim 1 , comprising applying a constant voltage to said second terminal of said one or more hybrid inductors.

6. The method according to claim 1 , comprising biasing said transistor during large signal operation by supplying current to said third terminal of said transistor utilizing a current source.

7. The method according to claim 1 , comprising amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

8. The method according to claim 7 , wherein said one or more amplifiers comprise differential amplifiers.

9. The method according to claim 1 , wherein said transistor comprises a MOSFET.

10. The method according to claim 1 , wherein said inductor comprises a passive inductor.

11. A system for processing signals, the system comprising:

one or more circuits that provides an electrical impedance that increases with frequency, wherein said one or more circuits comprises one or more hybrid inductors having a transistor coupled to a capacitor, an inductor, and a resistor, and wherein:

a first terminal of said one or more hybrid inductors comprises a first terminal of said transistor;

a second terminal of said transistor is coupled to a first terminal of said resistor and a first terminal of said capacitor;

a second terminal of said resistor comprises a second terminal of said one or more hybrid inductors;

a third terminal of said transistor is coupled to a first terminal of an inductor; and

a second terminal of said inductor is coupled to a second terminal of said capacitor and comprises a third terminal of said one or more hybrid inductors.

12. The system according to claim 11 , wherein said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a transconductance of said transistor.

13. The system according to claim 11 , wherein said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a resistance of said resistor.

14. The system according to claim 11 , wherein said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

15. The system according to claim 11 , wherein said one or more circuits is operable to apply a constant voltage to said second terminal of said one or more hybrid inductors.

16. The system according to claim 11 , wherein said one or more circuits is operable to apply a constant voltage to bias said transistor during large signal operation by supplying current to said third terminal of said transistor utilizing a current source.

17. The system according to claim 11 , wherein said one or more circuits is operable to apply a constant voltage to amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

18. The system according to claim 17 , wherein said one or more amplifiers comprise differential amplifiers.

19. The system according to claim 11 , wherein said transistor comprises a MOSFET.

20. The system according to claim 11 , wherein said inductor comprises a passive inductor.

21. A method for processing signals, the method comprising:

in an electrical circuit:

providing an electrical impedance that increases with frequency utilizing one or more hybrid inductors comprising a transistor coupled to a capacitor, an inductor, and a resistor; and

configuring an impedance of said one or more hybrid inductors by varying a resistance of said resistor

22. The method according to claim 21 , comprising configuring an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

23. The method according to claim 21 , comprising applying a constant voltage to said second terminal of said one or more hybrid inductors.

24. The method according to claim 21 , comprising amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

25. The method according to claim 24 , wherein said one or more amplifiers comprise differential amplifiers.

26. The method according to claim 21 , wherein said transistor comprises a MOSFET.

27. The method according to claim 21 , wherein said inductor comprises a passive inductor.

28. A system for processing signals, the system comprising:

one or more circuits that provides an electrical impedance that increases with frequency, wherein:

said one or more circuits comprises one or more hybrid inductors having a transistor coupled to a capacitor, an inductor, and a resistor; and

said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a resistance of said resistor.

29. The system according to claim 28 , wherein said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

30. The system according to claim 28 , wherein said one or more circuits is operable to apply a constant voltage to said second terminal of said one or more hybrid inductors.

31. The system according to claim 28 , wherein said one or more circuits is operable to apply a constant voltage to amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

32. The system according to claim 31 , wherein said one or more amplifiers comprise differential amplifiers.

33. The system according to claim 28 , wherein said transistor comprises a MOSFET.

34. The system according to claim 28 , wherein said inductor comprises a passive inductor.

35. A method for processing signals, the method comprising:

in an electrical circuit:

providing an electrical impedance that increases with frequency utilizing one or more hybrid inductors comprising a transistor coupled to a capacitor, an inductor, and a resistor; and

configuring an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

36. The method according to claim 35 , comprising amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

37. The method according to claim 36 , wherein said one or more amplifiers comprise differential amplifiers.

38. The method according to claim 35 , wherein said transistor comprises a MOSFET.

39. The method according to claim 35 , wherein said inductor comprises a passive inductor.

40. A system for processing signals, the system comprising:

one or more circuits that provides an electrical impedance that increases with frequency, wherein:

said one or more circuits comprises one or more hybrid inductors having a transistor coupled to a capacitor, an inductor, and a resistor; and

said one or more circuits is operable to configure an impedance of said one or more hybrid inductors by varying a capacitance of said capacitor.

41. The system according to claim 40 , wherein said one or more circuits is operable to apply a constant voltage to amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

42. The system according to claim 41 , wherein said one or more amplifiers comprise differential amplifiers.

43. The system according to claim 40 , wherein said transistor comprises a MOSFET.

44. The system according to claim 40 , wherein said inductor comprises a passive inductor.

45. A method for processing signals, the method comprising:

in an electrical circuit:

providing an electrical impedance that increases with frequency utilizing one or more hybrid inductors comprising a transistor coupled to a capacitor, an inductor, and a resistor; and

biasing said transistor during large signal operation by supplying current to said third terminal of said transistor utilizing a current source.

46. The method according to claim 45 , comprising amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

47. The method according to claim 46 , wherein said one or more amplifiers comprise differential amplifiers.

48. The method according to claim 45 , wherein said transistor comprises a MOSFET.

49. The method according to claim 45 , wherein said inductor comprises a passive inductor.

50. A system for processing signals, the system comprising:

one or more circuits that provides an electrical impedance that increases with frequency, wherein:

said one or more circuits comprises one or more hybrid inductors having a transistor coupled to a capacitor, an inductor, and a resistor; and

said one or more circuits is operable to apply a constant voltage to bias said transistor during large signal operation by supplying current to said third terminal of said transistor utilizing a current source.

51. The system according to claim 50 , wherein said one or more circuits is operable to apply a constant voltage to amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

52. The system according to claim 51 , wherein said one or more amplifiers comprise differential amplifiers.

53. The system according to claim 50 , wherein said transistor comprises a MOSFET.

54. The system according to claim 50 , wherein said inductor comprises a passive inductor.

55. A method for processing signals, the method comprising:

in an electrical circuit:

providing an electrical impedance that increases with frequency utilizing one or more hybrid inductors comprising a transistor coupled to a capacitor, an inductor, and a resistor; and

amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

56. The method according to claim 55 , wherein said one or more amplifiers comprise differential amplifiers.

57. The method according to claim 55 , wherein said transistor comprises a MOSFET.

58. The method according to claim 55 , wherein said inductor comprises a passive inductor.

59. A system for processing signals, the system comprising:

one or more circuits that provides an electrical impedance that increases with frequency, wherein:

said one or more circuits comprises one or more hybrid inductors having a transistor coupled to a capacitor, an inductor, and a resistor; and

said one or more circuits is operable to apply a constant voltage to amplifying signals utilizing said one or more hybrid inductors as a load of one or more amplifiers.

60. The system according to claim 59 , wherein said one or more amplifiers comprise differential amplifiers.

61. The system according to claim 59 , wherein said transistor comprises a MOSFET.

62. The system according to claim 61 , wherein said inductor comprises a passive inductor.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE THE ASSIGNOR'S NAME PREVIOUSLY RECORDED AT REEL: 058979 FRAME: 0027. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Mar 24, 2022
From: LUXTERA LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 059496/0803 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 8, 2022
From: CISCO SYSTEMS, INC.
To: CISCO TECHNOLOGY, INC.
Reel/Frame 058979/0027 →
RELEASE OF SECURITY INTEREST Recorded Dec 24, 2020
From: SILICON VALLEY BANK
To: LUXTERA, LLC
Reel/Frame 054855/0838 →
CHANGE OF NAME Recorded Feb 6, 2020
From: LUXTERA, INC.
To: LUXTERA LLC
Reel/Frame 052019/0811 →
SECURITY INTEREST Recorded Mar 29, 2017
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 042109/0140 →
SECURITY AGREEMENT Recorded Feb 27, 2014
From: LUXTERA, INC.
To: SILICON VALLEY BANK
Reel/Frame 032364/0867 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 14, 2012
From: KUCHARSKI, DANIEL
To: LUXTERA INC.
Reel/Frame 028985/0759 →