IP Library Granted Patent US 8,716,043
Granted Patent B2
US 8,716,043 · App. 12/881,440 · Granted May 6, 2014

Method for manufacturing semiconductor light emitting diode

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Quick Facts
Patent No.
US 8,716,043
App. No.
12/881,440
Granted
May 6, 2014
Kind
B2
Abstract

A high-efficiency semiconductor light emitting diode and a method for manufacturing the same are provided. The semiconductor LED has high internal quantum efficiency and can reduce the bad effect caused by the crystal defect. In the semiconductor light emitting diode, a conductive substrate has a three-dimensional top surface, and a light-emitting stack structure has a three-dimensional structure and includes an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer, which are sequentially formed on the conductive substrate. A p-electrode is formed on the p-type nitride semiconductor layer, and an n-electrode is formed on a bottom surface of the conductive substrate.

Claims (21)

1. A method for manufacturing a semiconductor light emitting diode, comprising the steps of:

a) preparing a conductive substrate whose top surface has a plurality of three-dimensional shapes, wherein the three-dimensional shapes comprise a first surface, and second and third surfaces inclined to and intersecting with the first surface;

b) sequentially growing an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on the first, second, and third surfaces of the conductive substrate, thereby forming a three-dimensional light-emitting stack structure;

c) forming a plurality of p-electrodes on the p-type nitride semiconductor layer;

d) forming a plurality of n-electrodes on a bottom surface of the conductive substrate;

e) removing portions of the light-emitting stack structure to expose the conductive substrate where the second and third surfaces intersect with the first surface; and

f) separating the resulting structure into individual devices.

2. The method of claim 1 , wherein the conductive substrate is one of a gallium nitride (GaN)-based substrate or a SiC substrate.

3. The method of claim 1 , wherein the conductive substrate has a thickness of more than 50 μm.

4. The method of claim 1 , wherein the step a) is carried out such that the top surface of the conductive substrate has a three-dimensional shape of 10-1000 μm in thickness.

5. The method of claim 1 , wherein the step a) is carried out using a wheel.

6. The method of claim 1 , wherein the step a) is carried out using a diamond pencil.

7. The method of claim 1 , wherein the active layer is grown to include at least one of c-plane, a-plane, and n-plane in the step b).

8. The method of claim 1 , further comprising the step of forming a passivation layer at the removed portions.

9. The method of claim 1 , further comprising the step of forming a groove at the bottom surface of the conductive substrate before step d) in order to reduce a thickness deviation of the conductive substrate.

10. The method of claim 1 , further comprising the step of processing the conductive substrate to have an uneven bottom surface in order to provide a roughness.

11. The method of claim 1 , wherein the step a) is carried out such that a top surface of the conductive substrate has a plurality of trapezoidal pyramid structures.

12. The method of claim 1 , further comprising the step of forming a passivation layer at edge portions of the light-emitting stack structure after the step e).

13. The method of claim 1 , wherein the step a) is carried out such that the conductive substrate has a plurality of V-shaped grooves on a top surface thereof.

14. The method of claim 13 , wherein the step e) is performed at apexes and valleys of the V-shaped grooves.

15. The method of claim 14 , further comprising the step of forming a passivation layer at the apexes and the valleys after the step e).

Assignments (1)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →