HIGH-CURRENT/LOW COST READ-IN INTEGRATED CIRCUIT
A Read-In Integrated Circuit scene generator incorporates an array of unit cells, with each cell having a switching control circuit. An array of emitting elements is associated with the unit cells and each element is connected with a lead to the switching control circuit of the associated cell. A first electrically conducting overlayer is deposited substantially covering the array of unit cells and connected for current supply. Each emitting element is connected to the first conducting overlayer and the first conducting overlayer includes vias through which each connecting lead from the emitting element to the switching control circuit extends. A second electrically conducting overlayer is deposited substantially covering the array of unit cells and connected for current return. Each switching control circuit is connected to the second conducting overlayer. The second conducting overlayer also has vias through which each lead from the emitting element extends to the switching circuit.
1 . A Read-In Integrated Circuit scene generator comprising:
an array of unit cells, each cell having a switching control circuit;
an array of emitting elements, each emitting element associated with one unit cell and connected with a lead to the switching control circuit of the associated cell;
a first electrically conducting overlayer substantially covering the array of unit cells and connected for current supply, each emitting element connected to the first conducting overlayer, said first conducting overlayer having a first plurality of vias through which each first lead extends; and
a second electrically conducting overlayer substantially covering the array of unit cells and connected for current return, each switching control circuit connected to the second conducting overlayer, said second conducting overlayer having a second plurality of vias through which each first lead extends.
2 . The Read-In Integrated Circuit scene generator of claim 1 wherein the switching control circuit is CMOS.
3 . The Read-In Integrated Circuit scene generator of claim 1 wherein the first conducting overlayer is copper.
4 . The Read-In Integrated Circuit scene generator of claim 1 wherein the second conducting overlayer is copper.
5 . The Read-In Integrated Circuit scene generator of claim 1 wherein at least one of the first and second electrically conducting overlayers is thermally conductive.
6 . A scene generator comprising:
a Read-In Integrated Circuit (RIIC) having an array of unit cells;
a first electrically conducting overlayer deposited covering the array of unit cells in the RIIC and connected for current supply;
a second electrically conducting overlayer deposited covering the array of unit cells in the RIIC and connected for current return;
an array of emitting elements corresponding to the array of unit cells deposited over the first electrically conducting overlayer and connected thereto, said first and second overlayers each having a plurality of vias, one of said plurality corresponding to each unit cell, each emitting element connected to the corresponding unit cell through said one of the plurality of vias and each of said unit cells connected to the second conducting overlayer.
7 . The scene generator of claim 6 wherein the switching control circuit is CMOS.
8 . The scene generator of claim 6 wherein the first conducting overlayer is copper.
9 . The scene generator of claim 6 wherein the second conducting overlayer is copper.
10 . The scene generator of claim 6 wherein at least one of the first and second electrically conducting overlayers is thermally conductive.
11 . A method for scene generation comprising:
providing a RIIC having an array of unit cells, each cell having a switching control circuit;
depositing a first electrically conducting overlayer over the RIIC array with a plurality of vias;
depositing a second electrically conducting overlayer over the RIIC array with a plurality of vias;
connecting the first conducting overlayer for current supply;
connecting the second conducting overlayer for current return;
depositing an array of emitting elements over the first conducting layer, said emitting elements connected to the first conducting array and connected through the plurality of vias in the first and second conducting overlayer to the RIIC array; and,
connecting the RIIC array to the second conducting overlayer.
12 . The method of claim 11 further comprising conducting heat generated by the emitting elements through at least one of the first and second conducting overlayers.