IP Library Granted Patent US 8,389,864
Granted Patent B2
US 8,389,864 · App. 12/895,062 · Granted Mar 5, 2013

Warp reactive IC package

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Quick Facts
Patent No.
US 8,389,864
App. No.
12/895,062
Granted
Mar 5, 2013
Kind
B2
Abstract

An apparatus and method for temperature induced warpage compensation in an integrated circuit package is disclosed. The apparatus consists of a layer of material bonded to the top of the integrated circuit package. The layer of material may have a generally planar-convex or a generally planar-concave cross-section. By appropriate choice of temperature coefficient and degree of concavity or convexity, the layer of material can compensate for either convex or concave warpage. In some embodiments the layer of material has apertures therein allowing compensation for more complex warpages. The apparatus provides an alternative to apparatus for dealing with IC package warpage known in the art.

Claims (10)

1. A temperature responsive warpage counteracting integrated circuit assembly for use with an integrated circuit package having a connection grid side and a top side, said integrated circuit assembly comprising:

a layer of material having a generally planar-convex cross-section, wherein a temperature coefficient of expansion is associated with said layer of material, a planar surface of the layer of material is bonded to the top side of said integrated circuit package, and convexity of the layer of material is sufficient for said temperature coefficient of expansion to counteract a warpage of said integrated circuit package.

2. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 1 , wherein said layer of material has at least one aperture therein.

3. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 2 , wherein said cross-section of said layer of material tapers in a vicinity of said at least one aperture.

4. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 2 , wherein said cross-section of said layer of material thickens in a vicinity of said at least one aperture.

5. A temperature responsive warpage counteracting integrated circuit assembly for use with an integrated circuit package having a connection grid side and a top side, said integrated circuit assembly comprising:

a layer of material having a generally planar-concave cross-section, wherein a temperature coefficient of expansion is associated with said layer of material, a planar surface of the layer of material is bonded to the top side of said integrated circuit package, and concavity of the layer of material is sufficient for said temperature coefficient of expansion to counteract a warpage of said integrated circuit package.

6. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 5 wherein said layer of material has at least one aperture therein.

7. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 6 , wherein said cross-section of said layer of material tapers in a vicinity of said at least one aperture.

8. The temperature responsive warpage counteracting integrated circuit assembly as claimed in claim 6 , wherein said cross-section of said layer of material thickens in a vicinity of said at least one aperture.

Assignments (4)
RELEASE OF SECURITY INTEREST Recorded Sep 4, 2014
From: CREDIT SUISSE AG
To: ALCATEL-LUCENT CANADA INC.
Reel/Frame 033686/0798 →
SECURITY INTEREST Recorded Jan 30, 2013
From: ALCATEL-LUCENT CANADA INC.
To: CREDIT SUISSE AG
Reel/Frame 029826/0927 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 17, 2011
From: ALCATEL-LUCENT CANADA INC.
To: ALCATEL LUCENT
Reel/Frame 027068/0967 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2010
From: BROWN, PAUL JAMES; CHAN, ALEX L.
To: ALCATEL-LUCENT CANADA INC.
Reel/Frame 025073/0100 →