IP Library Granted Patent US 8,476,882
Granted Patent B2
US 8,476,882 · App. 12/895,555 · Granted Jul 2, 2013

Reference voltage based equivalent series resistance (ESR) emulation for constant on-time (COT) control of buck regulators

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Quick Facts
Patent No.
US 8,476,882
App. No.
12/895,555
Granted
Jul 2, 2013
Kind
B2
Abstract

The present invention uses a reference voltage that varies within a Pulse Width Modulation (PWM) cycle to generate the PWM signal. This allows for stability in the feedback of Constant On-Time (COT) control for buck controllers when low Equivalent Series Resistance (ESR) capacitors are used as the output capacitor. The reference voltage is adjusted using features of a PWM cycle in a voltage mode without using external inductor current information.

Claims (32)

1. An integrated circuit including a buck regulator using Constant On-Time (COT) control comprising:

reference voltage generating circuitry to produce a reference voltage; and

comparison circuitry to produce a Pulse Width Modulation (PWM) signal, the comparison circuitry receiving the reference voltage from the reference voltage generating circuitry and a feedback voltage from a feedback pin of the integrated circuit;

wherein the reference voltage generating circuitry produces a reference voltage that varies within a PWM cycle of the PWM signal; and

wherein the reference voltage generating circuitry adjusts the reference voltage based on features of the PWM cycle.

2. The integrated circuit of claim 1 , wherein the reference voltage generator circuitry does not use a sensed ramp portion of an external inductor current to adjust the voltage reference.

3. The integrated circuit of claim 1 , wherein the reference voltage ramps up during at least a portion of PWM cycle.

4. The integrated circuit of claim 3 , wherein the reference voltage ramps up when the PWM signal is low.

5. The integrated circuit of claim 3 , wherein in a Discontinuous Conduction Mode (DCM) mode, the reference voltage is constant when an inductor voltage goes to zero.

6. The integrated circuit of claim 1 , wherein the reference voltage generator circuit includes a Resistor-Capacitor (RC) circuit.

7. The integrated circuit of claim 6 , wherein the reference voltage generator circuitry switches different voltages into the RC circuit to produce the reference voltage.

8. The integrated circuit of claim 1 , wherein the reference voltage generator circuitry switches between two voltage values.

9. The integrated circuit of claim 8 , wherein the two voltage values are adjusted up or down based on the feedback voltage.

10. The integrated circuit of claim 9 , wherein the two voltage values are adjusted up or down using a block including a low pass filter and a transconductance amplifier or voltage error amplifier.

11. The integrated circuit of claim 8 , wherein the switching between two voltage values occurs at the stop of a high and within a low of the PWM signal.

12. The integrated circuit of claim 1 , wherein the reference voltage is adjusted in a voltage mode without using current information.

13. A system comprising:

comparison circuitry to produce a Pulse Width Modulation (PWM) output, the comparison circuitry receiving the reference voltage from the reference voltage generating circuitry and a feedback voltage from a feedback pin of the integrated circuit; wherein the reference voltage generating circuitry produces a reference voltage that varies within a PWM cycle of the PWM signal;

wherein the reference voltage generating circuitry adjusts the reference voltage based on features of the PWM cycle;

an external inductor and output capacitor forming a LC circuit for the output voltage and a voltage divider connected to the output voltage to create the feedback voltage for the feedback pin of the integrated circuit; and

wherein the output capacitor is a ceramic capacitor with an Equivalent Series Resistance (ESR) of less than 15 milli-ohms, and the reference voltage generator circuitry adjusts the reference voltage so as to stabilize output voltage for constant on-time control.

14. The system of claim 13 , wherein the reference voltage generator circuitry does not use a sensed ramp portion of an external inductor current to adjust the reference voltage.

15. The system of claim 13 , wherein the reference voltage ramps up during at least a portion of PWM cycle.

16. The system of claim 15 , wherein the reference voltage ramps up when the PWM signal is low.

17. The system of claim 15 , wherein in a Discontinuous Conduction Mode (DCM) mode, the reference voltage is constant when an inductor voltage goes to zero.

18. The system of claim 13 , wherein the reference voltage generator circuit includes a Resistor-Capacitor (RC) circuit.

19. The system of claim 18 , wherein the reference voltage generator circuitry switches different voltages into the RC circuit to produce the reference voltage.

20. The system of claim 13 , wherein the reference voltage generator circuitry switches between two voltage values.

21. The system of claim 20 , wherein the two voltage values are adjusted up or down based on the feedback voltage.

22. The system of claim 21 , wherein the two voltage values are adjusted up or down using a block including a low pass filter and a transconductance amplifier or voltage error amplifier.

23. The system of claim 20 , wherein the switching between the two voltage values occurs at the stop of a high and within a low of the PWM signal.

24. The system of claim 13 , wherein the reference voltage is adjusted in a voltage mode without using current information.

Assignments (8)
SECURITY AGREEMENT Recorded Jul 9, 2021
From: MAXLINEAR, INC.; MAXLINEAR COMMUNICATIONS, LLC; EXAR CORPORATION
To: WELLS FARGO BANK, NATIONAL ASSOCIATION
Reel/Frame 056816/0089 →
RELEASE OF SECURITY INTEREST Recorded Jun 23, 2021
From: MUFG UNION BANK, N.A.
To: MAXLINEAR, INC.; EXAR CORPORATION; MAXLINEAR COMMUNICATIONS LLC
Reel/Frame 056656/0204 →
SUCCESSION OF AGENCY (REEL 042453 / FRAME 0001) Recorded Jul 1, 2020
From: JPMORGAN CHASE BANK, N.A.
To: MUFG UNION BANK, N.A.
Reel/Frame 053115/0842 →
MERGER AND CHANGE OF NAME Recorded Oct 4, 2017
From: EAGLE ACQUISITION CORPORATION; EXAR CORPORATION; EXAR CORPORATION
To: EXAR CORPORATION
Reel/Frame 044126/0634 →
SECURITY AGREEMENT Recorded May 12, 2017
From: MAXLINEAR, INC.; ENTROPIC COMMUNICATIONS, LLC (F/K/A ENTROPIC COMMUNICATIONS, INC.); EXAR CORPORATION
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 042453/0001 →
RELEASE OF SECURITY INTEREST Recorded Mar 9, 2015
From: STIFEL FINANCIAL CORP.
To: EXAR CORPORATION; CADEKA MICROCIRCUITS, LLC
Reel/Frame 035168/0384 →
SECURITY INTEREST Recorded May 29, 2014
From: EXAR CORPORATION; CADEKA MICROCIRCUITS, LLC
To: STIFEL FINANCIAL CORP.
Reel/Frame 033062/0123 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 20, 2011
From: LUO, JIA; CRONK, JON; NGUYEN, CHUONG
To: EXAR CORPORATION
Reel/Frame 025667/0212 →