Semiconductor device and fabrication method for the same
View Patent ↗The semiconductor device includes: memory cells each having a first multilayer electrode including a first lower electrode made of a first conductive film and a first upper electrode made of a second conductive film formed one on the other with a first interface film therebetween; and a diode having a diode electrode made of the second conductive film and a second interface film as a silicon oxide film formed at the interface between the diode electrode and a substrate. The first interface film has a thickness with which electrical connection between the lower electrode and the upper electrode is maintained, and the second interface film has a thickness with which epitaxial growth between the substrate and the diode electrode is inhibited.
1. A fabrication method for a semiconductor device, comprising the steps of:
(a) forming a first insulating film on a memory cell region of a substrate;
(b) forming a second insulating film on a diode region of the substrate;
(c) forming a first conductive film on the first insulating film and the second insulating film;
(d) selectively removing the first conductive film and the first insulating film using a mask insulating film to form a first opening in the memory cell region, and selectively removing the first conductive film and the second insulating film using the mask insulating film to form a second opening exposing the substrate in the diode region;
(e) forming a bit line diffusion layer in a region of the substrate exposed in the first opening in the memory cell region;
(f) forming a bit line insulating film in the first opening, said bit line insulating film filling the first opening;
(g) removing the mask insulating film and forming a silicon oxide film on the first conductive film and on a region of the substrate exposed in the second opening in the memory cell region and the diode region; and
(h) forming a second conductive film on the entire surface in the memory cell region and the diode region, wherein in the step (g), after removal of the mask insulating film, the silicon oxide film is formed by ozone cleaning.
2. The method of claim 1 , wherein a portion of the silicon oxide film formed on the first conductive film and a portion of the silicon oxide film formed on the region of the substrate exposed in the second opening have the same thickness.
3. The method of claim 1 , wherein the silicon oxide film has a thickness within a range of about 0.7 nm to about 1.3 nm inclusive.
4. The method of claim 1 , wherein in the step (g), an upper surface of the bit line insulating film is higher than an upper surface of the first conductive film.
5. The method of claim 1 , further comprising a step (i) of forming a third insulating film on a peripheral circuit region of the substrate before the step (c), wherein in the step (c), the first insulating film is formed on the third insulating film, in the step (g), the mask insulating film formed on the first conductive film in the step (d) is removed in the peripheral circuit region, and the silicon oxide film is formed on the first conductive film in the peripheral circuit region, and in the step (h), the second conductive film is formed on the entire surface in the peripheral circuit region.
6. The method of claim 5 , wherein
a part of the silicon oxide film formed on the first conductive film has the same thickness as a part of the silicon oxide film formed on a region of the substrate exposed in the second opening.
7. The method of claim 1 , wherein the silicon oxide film has a thickness within a range of about 0.7 nm to about 1.3 nm inclusive.