SYSTEM AND METHOD FOR ECMP LOAD SHARING
A packet classifier and a method for routing a data packet are provided. The packet classifier includes a content addressable memory, a translation table and a parameter memory. The method includes looking up a content addressable memory for a base address into a parameter memory using a header of the data packet. The base address is related to the routes under ECMP for forwarding the data packet. From among these addresses, using multiple headers of the data packet, an adjustment to the base address is computed. The adjustment specifies an actual address to the parameter memory corresponding to a selected route for forwarding the data packet. The parameter memory is then accessed using the actual address to obtain parameter values relevant to the selected route. The data packet is then forwarded according to the parameter values thus obtained.
1 . A network device comprising:
at least one port configured to receive a data packet; and
a first memory and a second memory,
wherein the network device is configured to:
retrieve a first entry in the first memory based on a portion of a first received data packet;
retrieve a first entry in the second memory based on the first entry in the first memory, the first entry in the second memory including information associated with a route over which the first received data packet should be forwarded;
retrieve the first entry in the first memory based on a portion of a second received data packet; and
retrieve a second entry in the second memory based on the first entry in the first memory, the second entry in the second memory being distinct from the first entry in the second memory, the second entry in the second memory including information associated with a route over which the second received data packet should be forwarded,
wherein the portion of the first received data packet and the portion of the second received data packet are substantially the same.
2 . The network device of claim 1 wherein the first memory is a content addressable memory (CAM) and wherein the second memory is a parameter random access memory (PRAM).