Thin film transistor, and display apparatus having the same
View Patent ↗A method of fabricating a thin film transistor includes forming a gate electrode on a substrate, forming a semiconductor layer on the gate electrode, forming a source electrode on the semiconductor layer, forming a drain electrode on the semiconductor layer spaced apart from the source electrode, forming a copper layer pattern on the source electrode and the drain electrode, exposing the copper layer pattern on the source electrode and the drain electrode to a fluorine-containing process gas to form a copper fluoride layer pattern thereon, and patterning the semiconductor layer.
1. A display apparatus comprising:
a first substrate comprising a pixel area;
a gate line formed on the first substrate;
a data line formed on the first substrate, the data line being insulated from and intersecting the gate line;
a gate electrode which extends from the gate line;
a semiconductor layer formed on the gate electrode;
a source electrode formed on the semiconductor layer and which extends from the data line;
a drain electrode formed on the semiconductor layer and spaced apart from the source electrode;
a pixel electrode formed in the pixel area and electrically connected to the drain electrode;
a second substrate; and
a common electrode formed on the second substrate substantially facing the pixel electrode, and
wherein the data line, the source electrode and the drain electrode each comprise a copper layer pattern and a copper fluoride layer pattern formed on a surface of the copper layer pattern.
2. The display apparatus of claim 1 , wherein the semiconductor layer comprises:
a first semiconductor layer pattern formed on the gate electrode and comprising an intrinsic semiconductor; and
a second semiconductor layer pattern comprising an impurity semiconductor, formed on the first semiconductor layer pattern and comprising:
a first portion disposed substantially on the source electrode; and
a second portion disposed substantially on the drain electrode.
3. The display apparatus of claim 2 , wherein at least a portion of the second semiconductor layer pattern overlaps at least a portion of the data line, at least a portion of the source electrode and at least a portion of the drain electrode.