MODULAR MASS STORAGE DEVICES AND METHODS OF USING
A modular mass storage device suitable for use with computers and other processing apparatuses. The mass storage device includes a controller board having a system interface connector, a memory controller, a cache device, and a second connector. The mass storage device further includes a daughter board having at least one non-volatile memory device for data storage, a read-only memory device containing firmware of the mass storage device, and a daughter board connector configured to mate with the second connector of the controller board and thereby form command, address and data paths between the memory controller and the memory device of the daughter board. The memory controller and the memory device are configured so that the memory controller reads the firmware of the read-only memory device when the daughter board connector is mated with the second connector of the controller board.
1 . A non-volatile memory-based mass storage device comprising:
a controller board having a system interface connector, a memory controller, a cache device, and a second connector; and
at least a first daughter board having at least one non-volatile memory device for data storage, a read-only memory device containing firmware of the mass storage device, and a first daughter board connector configured to mate with the second connector of the controller board and thereby form command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the first daughter board, the memory controller of the controller board and the read-only memory device of the first daughter board being configured so that the memory controller reads the firmware of the read-only memory device when the first daughter board connector is mated with the second connector of the controller board.
2 . The non-volatile memory-based mass storage device of claim 1 , wherein the system interface connector is a Serial ATA or serially-attached SCSI interface connector.
3 . The non-volatile memory-based mass storage device of claim 1 , wherein the controller board does not comprise any non-volatile memory devices for data storage.
4 . The non-volatile memory-based mass storage device of claim 3 , wherein the controller board does not comprise any read-only memory device containing firmware of the mass storage device.
5 . A method of using the mass storage device of claim 3 , the method comprising:
connecting the first daughter board with the controller board by mating the first daughter board connector with the second connector of the controller board to form the command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the first daughter board; and then
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the first daughter board.
6 . The non-volatile memory-based mass storage device of claim 3 , further comprising a second daughter board having at least one non-volatile memory device for data storage, a read-only memory device containing firmware of the mass storage device, and a second daughter board connector configured to mate with the second connector of the controller board and thereby form second command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the second daughter board, the memory controller of the controller board and the read-only memory device of the second daughter board being configured so that the memory controller reads the firmware of the read-only memory device of the second daughter board when the second daughter board connector is mated with the second connector of the controller board.
7 . The non-volatile memory-based mass storage device of claim 6 , wherein the second daughter board has a different type and/or amount of non-volatile memory devices than the first daughter board.
8 . A method of using the mass storage device of claim 6 , the method comprising:
connecting the first daughter board with the controller board by mating the first daughter board connector with the second connector of the controller board to form the command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the first daughter board;
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the first daughter board;
disconnecting the first daughter board from the controller board;
connecting the second daughter board with the controller board by mating the second daughter board connector with the second connector of the controller board and form the second command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the second daughter board; and then
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the second daughter board.
9 . The non-volatile memory-based mass storage device of claim 6 , wherein the first daughter board and the second daughter board are simultaneously connected to the controller board.
10 . The non-volatile memory-based mass storage device of claim 9 , wherein the firmware of the first daughter board and the second daughter board are complementary.
11 . A method of using the mass storage device of claim 10 , the method comprising:
detecting the firmware of the first daughter board and the firmware of the second daughter board with the memory controller; and then
allocating additional command, address and data paths to the first daughter board and the second daughter board.
12 . The non-volatile memory-based mass storage device of claim 1 , wherein the controller board further comprises at least one non-volatile memory device for data storage and a read-only memory device containing a primary firmware of the mass storage device, and the primary firmware of the controller board is overridden by the firmware of the first daughter board when the first daughter board is connected to the controller board.
13 . The non-volatile memory-based mass storage device of claim 12 , wherein the first daughter board has a different type and/or amount of non-volatile memory devices than the controller board.
14 . A method of using the mass storage device of claim 12 , the method comprising:
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the controller board;
connecting the first daughter board with the controller board by mating the first daughter board connector with the second connector of the controller board to form the command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the first daughter board;
overriding the primary firmware of the controller board with the firmware of the first daughter board; and then
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the first daughter board.
15 . The non-volatile memory-based mass storage device of claim 1 , wherein the controller board further comprises at least one non-volatile memory device for data storage and a read-only memory device containing a primary firmware of the mass storage device, the at least one non-volatile memory device of the first daughter board is part of a memory array of non-volatile memory devices on the first daughter board, the firmware of the first daughter board has specific information about the memory array, and the primary firmware of the controller board is complemented by the firmware of the first daughter board when the first daughter board is connected to the controller board.
16 . The non-volatile memory-based mass storage device of claim 15 , wherein the first daughter board has a different type and/or amount of non-volatile memory devices than the controller board.
17 . The non-volatile memory-based mass storage device of claim 15 , wherein the primary firmware of the controller board is stored in a first region of the read-only memory device of the controller board and contains data for the operation of the memory controller and its interfacing with a host system, and a second region of the read-only memory device of the controller board provides a placeholder for data supplied by the firmware contained by the read-only memory device of the first daughter board.
18 . A method of using the mass storage device of claim 15 , the method comprising:
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the controller board;
connecting the first daughter board with the controller board by mating the first daughter board connector with the second connector of the controller board to form the command, address and data paths between the memory controller of the controller board and the non-volatile memory device of the first daughter board;
partially disabling the primary firmware of the controller board with the firmware of the first daughter board and causing the firmware of the first daughter board to complement the primary firmware of the controller board; and then
operating the memory controller of the controller board to write and read data to and from the non-volatile memory device of the first daughter board.
19 . The method of claim 18 , wherein the primary firmware of the controller board is stored in a first region of the read-only memory device of the controller board and contains data for the operation of the memory controller and its interfacing with a host system, and a second region of the read-only memory device of the controller board provides a placeholder for data supplied by the firmware contained by the read-only memory device of the first daughter board.
20 . The method of claim 19 , wherein the data supplied by the firmware of the first daughter board contains information regarding the array of non-volatile memory devices on the first daughter board and operational parameters of the non-volatile memory devices thereof.