Thin film transistor array panel and method for manufacturing the same

1. A method for manufacturing a thin film transistor array panel, the method comprising:

forming a gate line on a substrate;

forming a storage electrode line on the substrate in the forming of a gate line;

forming a gate insulating layer on the gate line;

forming a semiconductor on the gate insulating layer;

forming a first data line and a first drain electrode on the semiconductor;

forming a lower passivation layer on the first data line and the first drain electrode;

forming an upper passivation layer including protrusions and depressions, to define a preliminary contact hole and an opening separate from the preliminary contact hole in the upper passivation layer, wherein each of the preliminary contact hole and the opening exposes the lower passivation layer and overlaps the storage electrode line;

forming a metal layer on the upper passivation layer;

forming a photosensitive film on the metal layer;

etching only the metal layer by using the photosensitive film as an etching mask to form a reflecting electrode, wherein the exposed lower passivation layer remains in the preliminary contact hole by the etching only the metal layer and the remaining exposed lower passivation layer is exposed through the preliminary contact hole by the etching only the metal layer;

etching the exposed lower passivation layer remaining in the preliminary contact hole, after the etching only the metal layer, to form a first contact hole exposing the first drain electrode; and

forming a connection assistance member connecting the first drain electrode and the reflecting electrode to each other through the first contact hole after removing the photosensitive film,

wherein the reflecting electrode contacts the exposed lower passivation layer through the opening.

2. The method of claim 1 , wherein after the forming of a metal layer,

the upper passivation layer is disposed between the metal layer and the lower passivation layer; and

the reflecting electrode is formed only by the etching of the metal layer.

3. The method of claim 1 , wherein after the forming of a metal layer,

the upper passivation layer is disposed between the metal layer and the lower passivation layer, and

in the etching of the exposed lower passivation layer, the upper passivation layer is not etched and only the lower passivation layer is etched.

4. The method of claim 1 , wherein

the etching of the metal layer includes wet-etching; and

the etching of the exposed lower passivation layer includes dry-etching.

5. The method of claim 4 , wherein

the metal layer is over-etched in the etching of the metal layer, to form an undercut under the photosensitive film.

6. The method of claim 5 , wherein

the under-cut is formed within a depth of 3 micrometers.

7. The method of claim 1 , wherein the forming of an upper passivation layer includes:

coating a photosensitive organic layer on the lower passivation layer; and

exposing the photosensitive organic layer by using a photomask including a transmission region, a translucent region, and a light blocking region.

8. The method of claim 7 , wherein

the translucent region of the photomask includes a semi-transparent layer including slits, and

the translucent region is disposed overlapping a portion of the substrate where the reflecting electrode is positioned, in the exposing of the photosensitive organic layer by using a photomask.

9. The method of claim 7 , wherein

the translucent region of the photomask includes a first translucent region and a second translucent region having different light transmittance, and

in the exposing of the photosensitive organic layer by using the photomask, the first translucent region is disposed overlapping a portion of the substrate where the reflecting electrode will be formed, and the second translucent region is disposed overlapping edges of ends of the gate line or the data line.

10. The method of claim 1 , wherein

a second data line and a second drain electrode are further formed in the forming of a first data line and a first drain electrode;

a second contact hole exposing the second drain electrode is formed in the forming of a first contact hole; and

a transmitting electrode connected to the second drain electrode through the second contact hole on the upper passivation layer is formed in the forming of a connection assistance member.

11. The method of claim 10 , wherein

the forming of a semiconductor, the forming of a first and a second data line, and the forming of a first and second drain electrode includes using a photosensitive film pattern having different thicknesses depending on the positions of the substrate.