IP Library Granted Patent US 8,339,528
Granted Patent B2
US 8,339,528 · App. 12/907,503 · Granted Dec 25, 2012

Erasing device and method of display medium, and erasing signal setting method

Assignee: NLT Technologies, Ltd.
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Quick Facts
Patent No.
US 8,339,528
App. No.
12/907,503
Granted
Dec 25, 2012
Kind
B2
Abstract

To provide an erasing device whose power consumption required for erasing operations is suppressed, which does not spoil the portability of an optical writing type display medium. In a first display function layer, voltages applied to two cholesteric liquid crystal layers when an erasing voltage is applied between a pair of electrodes are defined as V 1 , V 2 , respectively, and threshold voltages with which the cholesteric liquid crystal layers change to the homeotropic alignment are defined as Vth 1 , Vth 2 , respectively. In that case, in a state the voltages V 1 and V 2 are determined according to only each resistance of the cholesteric liquid crystal layers and resistance of a photoconductive layer, i.e., a sufficient time has passed from a point at which the erasing voltage is applied, V 1 ≧Vth 1 and V 2 ≧Vth 2 apply.

Claims (361)

1. An erasing device used for erasing an image pattern recorded on an optical writing type display medium that includes a display function layer in a structure in which a laminate including a photoconductive layer and n-layers (n is a natural number) of cholesteric liquid crystal layers is sandwiched between a pair of electrodes, the erasing device comprising

a signal generating section that applies an erasing voltage for erasing the image pattern to the pair of electrodes, wherein

in a state where Vm is determined according to each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer, the erasing voltage is set to satisfy Vm≧Vthm in all cases where m is an integer of 1 to n, provided that m takes any integers from 1 to n, a voltage applied to the m-th layer of the cholesteric liquid crystal layer when the erasing voltage is applied between the pair of electrodes is Vm, and a threshold voltage with which the m-th layer of the cholesteric liquid crystal layer changes to an homeotropic alignment is Vthm.

2. The erasing device as claimed in claim 1 , wherein

the erasing voltage is further set to satisfy a following expression (1), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , the maximum value out of the n-pieces of the threshold voltages is V thmax :

[

Numerical

Expression

1

]

V

0

nR

LC

+

R

PC

R

LC

V

thmax

.

(

1

)

3. The erasing device as claimed in claim 2 , wherein

in a state where the Vm is determined according to each static capacitance of the n-layers of the cholesteric liquid crystal layers and static capacitance of the photoconductive layer immediately after the erasing voltage is applied to the pair of electrodes, and thereafter becomes close to a value that is determined according to each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer,

the erasing voltage is further set to satisfy Vm≧Vthm in all time of a period from a point at which the erasing voltage is applied to a point at which the m-th layer of the cholesteric liquid crystal layer changes to the homeotropic alignment and in all cases where m is an integer of 1 to n.

4. The erasing device as claimed in claim 3 , wherein

the erasing voltage is further set to satisfy a following expression (2), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , each static capacitance of the cholesteric liquid crystal layers is C LC , the static capacitance of the photoconductive layer is C PC , the maximum value out of the n-pieces of the threshold voltages is V thmax , time required for changing to the homeotropic alignment is t H , and a charging/discharging time constant of the display function layer is:

[

Numerical

Expression

2

]

V

0

V

thmax

(

C

PC

nC

PC

+

C

LC

-

R

LC

R

PC

+

nR

LC

)

exp

(

-

t

H

τ

)

+

R

LC

R

PC

+

nR

LC

.

(

2

)

5. The erasing device as claimed in claim 4 , wherein

the n is an integer of 2 or larger.

6. The erasing device as claimed in claim 5 , wherein

the erasing voltage V 0 is equal to a right side of the expression (2).

7. The erasing device as claimed in claim 6 , wherein

the erasing voltage is a direct-current voltage.

8. The erasing device as claimed in claim 7 , wherein the display medium includes a plurality of the display function layers,

the erasing device further comprising a connection control section that applies a voltage remained in a part of the display function layers to another display function layer, after the erasing voltage outputted from the signal generating section is applied to the part of the display function layers.

9. The erasing device as claimed in claim 8 , further comprising a discharging section that eliminates the voltage remained in the display function layer after the erasing voltage is applied.

10. The erasing device as claimed in claim 3 , wherein:

the display medium includes a plurality of the display function layers; and

the erasing voltage is further set to satisfy a following expression (2), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , each static capacitance of the cholesteric liquid crystal layers is C LC , the static capacitance of the photoconductive layer is C PC , the maximum value out of the n-pieces of the threshold voltages of the n-layers of the display function layers as the maximum is V thmax , time required for changing to the homeotropic alignment is t H , and a charging/discharging time constant of the display function layer is:

[

Numerical

Expression

4

]

V

0

V

thmax

(

C

PC

nC

PC

+

C

LC

-

R

LC

R

PC

+

nR

LC

)

exp

(

-

t

H

τ

)

+

R

LC

R

PC

+

nR

LC

.

(

2

)

11. The erasing device as claimed in claim 1 , wherein:

the display medium includes a plurality of the display function layers; and

the erasing voltage is further set to satisfy a following expression (1), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , the maximum value out of the n-pieces of the threshold voltages of the n-layers of the display function layers as the maximum is V thmax :

[

Numerical

Expression

3

]

V

0

nR

LC

+

R

PC

R

LC

V

thmax

.

(

1

)

12. An erasing method used for erasing an image pattern recorded on an optical writing type display medium that includes a display function layer in a structure in which a laminate including a photoconductive layer and n-layers (n is a natural number) of cholesteric liquid crystal layers is sandwiched between a pair of electrodes, the erasing method comprising:

in a state where Vm is determined according to each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer, setting the erasing voltage to satisfy Vm≧Vthm in all cases where m is an integer of 1 to n, provided that m takes any integers from 1 to n, a voltage applied to the m-th layer of the cholesteric liquid crystal layer when the erasing voltage is applied between the pair of electrodes is Vm, and a threshold voltage with which the m-th layer of the cholesteric liquid crystal layer changes to an homeotropic alignment is Vthm; and

erasing the image pattern by applying the set erasing voltage between the pair of electrodes.

13. The erasing method as claimed in claim 12 , wherein

when setting the erasing voltage, the erasing voltage is set to satisfy a following expression (1), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , the maximum value out of the n-pieces of the threshold voltages is V thmax :

[

Numerical

Expression

5

]

V

0

nR

LC

+

R

PC

R

LC

V

thmax

.

(

1

)

14. The erasing method as claimed in claim 13 , wherein

when setting the erasing voltage, the erasing voltage is further set to satisfy Vm≧Vthm in all time of a period from a point at which the erasing voltage is applied to a point at which the m-th layer of the cholesteric liquid crystal layer changes to the homeotropic alignment and in all cases where m is an integer of 1 to n, in a state where the Vm is determined according to each static capacitance of the n-layers of the cholesteric liquid crystal layers and static capacitance of the photoconductive layer immediately after the erasing voltage is applied to the pair of electrodes, and thereafter becomes close to a value that is determined according to only each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer.

15. The erasing method as claimed in claim 14 , wherein

when setting the erasing voltage, the erasing voltage is further set to satisfy a following expression (2), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , each static capacitance of the cholesteric liquid crystal layers is C LC , the static capacitance of the photoconductive layer is C PC , the maximum value out of the n-pieces of the threshold voltages is V thmax , time required for changing to the homeotropic alignment is t H , and a charging/discharging time constant of the display function layer is:

[

Numerical

Expression

6

]

V

0

V

thmax

(

C

PC

nC

PC

+

C

LC

-

R

LC

R

PC

+

nR

LC

)

exp

(

-

t

H

τ

)

+

R

LC

R

PC

+

nR

LC

.

(

2

)

16. An erasing signal setting method for setting an erasing voltage applied between a pair of electrodes for erasing an image pattern recorded on an optical writing type display medium that includes a display function layer in a structure in which a laminate including a photoconductive layer and n-layers (n is a natural number) of cholesteric liquid crystal layers is sandwiched between the pair of electrodes, the erasing signal setting method comprising:

defining that m takes any integers from 1 to n, a voltage applied to the m-th layer of the cholesteric liquid crystal layer when the erasing voltage is applied between the pair of electrodes is Vm, and a threshold voltage with which the m-th layer of the cholesteric liquid crystal layer changes to an homeotropic alignment is Vthm; and

in a state where Vm is determined according to each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer, setting the erasing voltage to satisfy Vm≧Vthm in all cases where m is an integer of 1 to n.

17. The erasing signal setting method as claimed in claim 16 , wherein

when setting the erasing voltage, the erasing voltage is further set to satisfy a following expression (1), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , and the maximum value out of the n-pieces of the threshold voltages is V thmax :

[

Numerical

Expression

7

]

V

0

nR

LC

+

R

PC

R

LC

V

thmax

.

(

1

)

18. The erasing signal setting method as claimed in claim 17 , wherein

when setting the erasing voltage, the erasing voltage is further set to satisfy Vm≧Vthm in all time of a period from a point at which the erasing voltage is applied to a point at which the m-th layer of the cholesteric liquid crystal layer changes to the homeotropic alignment and in all cases where m is an integer of 1 to n, in a state where Vm is determined according to each static capacitance of the n-layers of the cholesteric liquid crystal layers and static capacitance of the photoconductive layer immediately after the erasing voltage is applied to the pair of electrodes, and thereafter becomes close to a value that is determined according to

each resistance of the n-layers of the cholesteric liquid crystal layers and resistance of the photoconductive layer.

19. The erasing signal setting method as claimed in claim 18 , wherein

when setting the erasing voltage, the erasing voltage is further set to satisfy a following expression (2), provided that the erasing voltage is V 0 , each resistance of the cholesteric liquid crystal layers is R LC , the resistance of the photoconductive layer is R PC , each static capacitance of the cholesteric liquid crystal layers is C LC , the static capacitance of the photoconductive layer is C PC , the maximum value out of the n-pieces of the threshold voltages is V thmax , time required for changing to the homeotropic alignment is t H , and a charging/discharging time constant of the display function layer is:

[

Numerical

Expression

8

]

V

0

V

thmax

(

C

PC

nC

PC

+

C

LC

-

R

LC

R

PC

+

nR

LC

)

exp

(

-

t

H

τ

)

+

R

LC

R

PC

+

nR

LC

.

(

2

)

20. An optical writing type display medium that includes a display function layer in a structure in which a laminate including a photoconductive layer and n-layers (n is a natural number) of cholesteric liquid crystal layers is sandwiched between a pair of electrodes, the display medium being provided with the erasing device of claim 1 .

Assignments (2)
CHANGE OF NAME Recorded Nov 8, 2011
From: NEC LCD TECHNOLOGIES, LTD.
To: NLT TECHNOLOGIES, LTD.
Reel/Frame 027195/0933 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2010
From: MORI, KENICHI; SATOU, TETSUSHI; SHIGEMURA, KOJI; KANEKO, SETSUO
To: NEC LCD TECHNOLOGIES, LTD.
Reel/Frame 025160/0625 →
Priority Claims (1)
JP 2009-241894 · Oct 20, 2009 · national
Continuity (1)
Related Publication 20110090412A1 · Apr 21, 2011