IP Library Granted Patent US 8,178,378
Granted Patent B2
US 8,178,378 · App. 12/909,204 · Granted May 15, 2012

Method of manufacturing vertical nitride semiconductor light emitting diode

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Quick Facts
Patent No.
US 8,178,378
App. No.
12/909,204
Granted
May 15, 2012
Kind
B2
Abstract

A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat.

Claims (38)

1. A method of manufacturing a vertical semiconductor LED, said method comprising:

sequentially forming a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate;

forming a second electrode on the second semiconductor layer;

forming a structure support layer on the second electrode;

removing the substrate through an LLO (Laser Lift-Off) process;

selectively etching a portion of the buffer layer, from which the substrate has been removed, so as to expose a substantially flat portion of the first semiconductor layer;

forming a first electrode on the substantially flat, exposed portion of the first semiconductor layer; and

forming irregularities by etching un unetched portion of the buffer layer;

wherein the buffer layer and the first electrode are spaced from each other.

2. The method according to claim 1 ,

wherein said selectively etching includes a dry-etching process.

3. The method according to claim 2 , wherein the irregularities are formed by a wet-etching process.

4. The method according to claim 1 , wherein the irregularities are formed on the buffer layer.

5. The method according to claim 1 , wherein said selectively etching defines a concave cavity with the substantially flat portion of the first semiconductor layer being exposed at a bottom of the concave cavity.

6. The method according to claim 5 , wherein the first electrode is formed in the cavity and on the substantially flat, exposed portion of the first semiconductor layer.

7. The method according to claim 5 , wherein said selectively etching partially removes a partial thickness of the first semiconductor layer to form the concave cavity which has side walls that are partially formed by the first semiconductor layer being etched.

8. A method of manufacturing a vertical semiconductor LED, said method comprising:

sequentially forming a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate;

forming a second electrode on the second semiconductor layer;

forming a structure support layer on the second electrode;

removing the substrate through an LLO (Laser Lift-Off) process to expose a surface of the buffer layer;

performing a selective etching process on a first portion of the exposed surface of the buffer layer, from which the substrate has been removed, to form a concave cavity with a substantially flat portion of the first semiconductor layer being exposed at a bottom of the concave cavity, wherein side walls of the concave cavity are partially formed by the first semiconductor layer being etched;

forming a first electrode in the cavity and on the substantially flat, exposed portion of the first semiconductor layer; and

forming irregularities by performing an etching process on a second portion of the exposed surface of the buffer layer, wherein the second portion is outside the first portion.

9. The method according to claim 8 , wherein said selective etching process includes a dry-etching process.

10. The method according to claim 9 , wherein the etching process, by which the irregularities are formed, includes a wet-etching process.

11. The method according to claim 8 , wherein the irregularities are formed on the buffer layer.

12. The method according to claim 8 , wherein the first electrode is formed to be inwardly spaced from the side walls of the cavity.

13. A method of manufacturing a vertical semiconductor LED, the method comprising:

sequentially forming a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate;

forming a second electrode on the second semiconductor layer;

forming a structure support layer on the second electrode to obtain a first multi-layer structure;

removing the substrate from the first multi-layer structure to obtain a second multi-layer structure having a surface exposed by said removal of the substrate;

selectively etching a first area of said exposed surface of the second multi-layer structure so as to expose a substantially flat portion of the first semiconductor layer;

forming a first electrode on the substantially flat, exposed portion of the first semiconductor layer; and

forming irregularities by etching a second area of said exposed surface of the second multi-layer structure, wherein said second area is outside the first area;

wherein the second area and the first electrode are spaced from each other.

14. The method according to claim 13 , wherein said selectively etching partially removes a partial thickness of the first semiconductor layer to form a concave cavity which has side walls that are partially formed by the first semiconductor layer being etched.

Assignments (3)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG LED CO., LTD.
Reel/Frame 025188/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2010
From: YOON, SANG HO; LEE, SU YEOL; BAIK, DOO GO; CHOI, SEOK BEOM; JANG, TAE SUNG; WOO, JONG GUN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 025174/0088 →