IP Library Granted Patent US 8,198,114
Granted Patent B2
US 8,198,114 · App. 12/909,297 · Granted Jun 12, 2012

Vertical nitride semiconductor light emitting diode and method of manufacturing the same

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Quick Facts
Patent No.
US 8,198,114
App. No.
12/909,297
Granted
Jun 12, 2012
Kind
B2
Abstract

A vertical nitride-based semiconductor LED comprises a structure support layer; a p-electrode formed on the structure support layer; a p-type nitride semiconductor layer formed on the p-electrode; an active layer formed on the p-type nitride semiconductor layer; an n-type nitride semiconductor layer formed on the active layer; an n-electrode formed on a portion of the n-type nitride semiconductor layer; and a buffer layer formed on a region of the n-type nitride semiconductor layer on which the n-electrode is not formed, the buffer layer having irregularities formed thereon. The surface of the n-type nitride semiconductor layer coming in contact with the n-electrode is flat.

Claims (18)

1. A method of manufacturing a vertical semiconductor LED, said method comprising:

sequentially forming a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate;

forming a second electrode on the second semiconductor layer;

forming a structure support layer on the second electrode;

removing the substrate through an LLO (Laser Lift-Off) process;

selectively etching a portion of the buffer layer, from which the substrate is removed, so as to expose a substantially flat portion of the first semiconductor layer;

forming irregularities by etching the unetched portion of the buffer layer; and

forming a first electrode on the exposed substantially flat portion of the first semiconductor layer.

2. The method according to claim 1 , wherein in the etching of the buffer layer to expose the substantially flat portion of the first semiconductor layer, a dry-etching process is used.

3. A method of manufacturing a vertical semiconductor LED, said method comprising:

sequentially forming a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer on a substrate;

forming a second electrode on the second semiconductor layer;

forming a structure support layer on the second electrode;

removing the substrate through an LLO (Laser Lift-Off) process;

forming irregularities by etching the entire surface of the buffer layer, from which the substrate is removed;

selectively etching a portion of the buffer layer, on which the irregularities are formed, so as to expose a substantially flat portion of the first semiconductor layer; and

forming a first electrode on the exposed substantially flat portion of the first semiconductor layer.

4. The method according to claim 3 , wherein in the etching of the portion of the buffer layer, a dry-etching process is used.

Assignments (3)
MERGER Recorded Aug 7, 2012
From: SAMSUNG LED CO., LTD.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 028744/0272 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 25, 2010
From: SAMSUNG ELECTRO-MECHANICS CO., LTD.
To: SAMSUNG LED CO., LTD.
Reel/Frame 025188/0223 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 21, 2010
From: YOON, SANG HO; LEE, SU YEOL; BAIK, DOO GO; CHOI, SEOK BEOM; JANG, TAE SUNG; WOO, JONG GUN
To: SAMSUNG ELECTRO-MECHANICS CO., LTD.
Reel/Frame 025174/0525 →