Semiconductor device and method of manufacturing semiconductor device

1. A semiconductor device comprising:

a compound semiconductor layer provided over a substrate;

a plurality of source electrodes and a plurality of drain electrodes provided over the compound semiconductor layer;

a plurality of first vias each of which is configured to pass through the compound semiconductor layer and be coupled to a corresponding one of the plurality of source electrodes;

a plurality of second vias each of which is configured to pass through the compound semiconductor layer and be coupled to a corresponding one of the plurality of drain electrodes;

a common source wiring line configured to be coupled to the plurality of first vias and be buried in the substrate; and

a common drain wiring line configured to be coupled to the plurality of second vias and be buried in the substrate.

2. The semiconductor device according to claim 1 , wherein

the substrate includes one of SiC, GaN, AlN, and Si.

3. The semiconductor device according to claim 1 , wherein

the compound semiconductor layer includes a nitride semiconductor.

4. The semiconductor device according to claim 1 , wherein

the compound semiconductor layer includes a buffer layer, a channel layer, and an electron supply layer.

5. The semiconductor device according to claim 1 , wherein

each of the source electrode and the drain electrode is a multilayer film that includes Ti and Al.

6. The semiconductor device according to claim 1 , wherein

each of the common source wiring line and the common drain wiring line includes Cu.

7. The semiconductor device according to claim 1 , further comprising:

a third via configured to pass through the compound semiconductor layer and be coupled to at least one of the common source wiring line and the common drain wiring line; and

an extraction electrode provided over the compound semiconductor layer and configured to be coupled to the third via.

8. The semiconductor device according to claim 7 , wherein

the third via includes:

a stopper configured to pass through the compound semiconductor layer and be coupled to the extraction electrode; and

a fourth via configured to be coupled to the stopper, pass through the substrate, and be coupled to at least one of the common source wiring line and the common drain wiring line.

9. The semiconductor device according to claim 1 , wherein

the substrate includes a first wiring trench and a second wiring trench located away from the first wiring trench, wherein

the common source wiring line is buried in the first wiring trench, and

the common drain wiring line is buried in the second wiring trench.

10. The semiconductor device according to claim 1 , wherein

the source electrode is coupled to a source wiring line provided over the source electrode,

the source wiring line is coupled to the first via,

the drain electrode is coupled to a drain wiring line provided over the drain electrode, and

the drain wiring line is coupled to the second via.

11. The semiconductor device according to claim 1 , further comprising:

a heat release plate configured to face the common source wiring line and the common drain wiring line.

12. The semiconductor device according to claim 11 , wherein

the heat release plate includes AlN.

13. The semiconductor device according to claim 1 , further comprising:

an insulation film configured to cover the substrate, the common source wiring line, and the common drain wiring line.

14. The semiconductor device according to claim 13 , wherein

the insulation film includes one of AlN, AISiC, and SiC.