IP Library Granted Patent US 8,264,070
Granted Patent B2
US 8,264,070 · App. 12/914,217 · Granted Sep 11, 2012

Package structure with ESD and EMI preventing functions

Assignee: Siliconware Precision Industries Co., Ltd.
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Quick Facts
Patent No.
US 8,264,070
App. No.
12/914,217
Granted
Sep 11, 2012
Kind
B2
Abstract

A package structure with ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions includes: a carrier having first and second ground structures electrically insulated from one another; a semiconductor component disposed on one surface of the carrier and electrically connected to the first ground structure; and a lid member disposed to cover the carrier and the semiconductor component and electrically connected to the second ground structure. The semiconductor component and the lid member are electrically connected with the first ground structure and the second ground structure, respectively, such that electrostatic charges and electromagnetic waves can be conducted away individually without damaging the semiconductor component, thereby improving yield and reducing the risk of short circuits.

Claims (15)

1. A package structure with ESD (electrostatic discharge) and EMI (electromagnetic interference) preventing functions, comprising:

a carrier having a first surface and an opposite second surface and having a first ground structure and a second ground structure electrically insulated from one another;

at least a semiconductor component disposed on the first surface of the carrier and electrically connected to the carrier and the first ground structure;

an encapsulant formed on the first surface of the carrier for encapsulating the semiconductor component; and

a lid member disposed on the encapsulant for covering the semiconductor component and electrically connected to the second ground structure.

2. The package structure of claim 1 , wherein the second ground structure is disposed around periphery or at corners of the carrier.

3. The package structure of claim 2 , wherein a plurality of conductive members are disposed on the second surface of the carrier so as to electrically connect to the first ground structure and the second ground structure, respectively.

4. The package structure of claim 2 , wherein the second ground structure comprises conductive through holes penetrating the first and second surfaces of the carrier, and the lid member is disposed on terminals of the conductive through holes on the first surface of the carrier.

5. The package structure of claim 1 , wherein the carrier further has an internal circuit.

6. The package structure of claim 5 , wherein the at least a semiconductor component is electrically connected to the internal circuit and the first ground structure of the carrier through wire bonding or in a flip-chip manner.

7. The package structure of claim 1 , wherein the semiconductor component is an active component, a passive component or a combination thereof.

8. The package structure of claim 7 , wherein the passive component is a capacitor, a resistor or an inductor.

9. The package structure of claim 1 , wherein a plurality of dummy pads are disposed on the second surface of the carrier, and the second ground structure is electrically connected to the dummy pads.

10. The package structure of claim 9 , wherein the dummy pads are disposed at positions other than periphery or corners of the carrier.

11. The package structure of claim 1 , wherein the encapsulant encapsulates the lid member.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 28, 2010
From: TSAI, TSUNG-HSIEN; CHU, HENG-CHENG; CHUNG, HSIN-LUNG; YANG, CHAO-YA
To: SILICONWARE PRECISION INDUSTRIES CO., LTD.
Reel/Frame 025211/0467 →
Priority Claims (1)
TW 99132145 A · Sep 23, 2010 · national
Continuity (1)
Related Publication 20120074538A1 · Mar 29, 2012