IP Library Granted Patent US 8,114,751
Granted Patent B2
US 8,114,751 · App. 12/914,623 · Granted Feb 14, 2012

Multi-angle rotation for ion implantation of trenches in superjunction devices

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Quick Facts
Patent No.
US 8,114,751
App. No.
12/914,623
Granted
Feb 14, 2012
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes providing a semiconductor wafer and forming at least one first trench in the wafer having first and second sidewalls and a first orientation on the wafer. The first sidewall of the at least one first trench is implanted with a dopant of a first conductivity at a first implantation direction. The first sidewall of the at least one first trench is implanted with the dopant of the first conductivity at a second implantation direction. The second implantation direction is orthogonal to the first implantation direction. The first and second implantation directions are non-orthogonal to the first sidewall.

Claims (20)

1. A method of manufacturing a semiconductor device comprising:

(a) providing a semiconductor wafer;

(b) forming at least one first trench in the wafer, the at least one first trench having first and second sidewalls and a first orientation on the wafer;

(c) implanting, with a dopant of a first conductivity, the first sidewall of the at least one first trench at a first implantation direction; and

(d) implanting, with the dopant of the first conductivity, the first sidewall of the at least one first trench at a second implantation direction, the second implantation direction being orthogonal to the first implantation direction, the first and second implantation directions being non-orthogonal to the first sidewall.

2. The method of claim 1 , further comprising:

(e) implanting, with the dopant of the first conductivity, the second sidewall of the at least one first trench at a third implantation direction, the third implantation direction being orthogonal to one of the first implantation direction and the second implantation direction; and

(f) implanting, with the dopant of the first conductivity, the second sidewall of the at least one first trench at a fourth implantation direction, the fourth implantation direction being orthogonal to the third implantation direction, the third and fourth implantation directions being non-orthogonal to the second sidewall.

3. The method of claim 2 , further comprising:

(g) prior to the implantation steps, forming at least one second trench having first and second sidewalls and a second orientation on the wafer, the second orientation being different from the first orientation.

4. The method of claim 3 , wherein the first and second sidewalls of the at least one second trench are implanted with the dopant of the first conductivity during the steps (c)-(f).

5. The method of claim 4 , wherein a concentration of the dopant of the first conductivity in the first and second sidewalls of the at least one first trench is different than a concentration of the dopant of the first conductivity in the first and second sidewalls of the at least one second trench.

6. The method of claim 3 , wherein the second orientation is non-orthogonal to the first orientation.

7. The method of claim 2 , wherein the steps (a)-(f) are performed sequentially.

8. The method of claim 2 , wherein prior to commencement of each of the steps (a)-(f), the respective preceding step is substantially completed.

9. The method of claim 2 , wherein prior to commencement of each of the steps (a)-(f), the respective preceding step is fully completed.

10. A semiconductor device formed by the method of claim 2 .

11. The method of claim 1 , wherein the steps (a)-(d) are performed sequentially.

12. The method of claim 1 , wherein prior to commencement of each of the steps (a)-(d), the respective preceding step is substantially completed.

13. The method of claim 1 , wherein prior to commencement of each of the steps (a)-(d), the respective preceding step is fully completed.