Device for processing a knock sensor signal
For the processing of a knock sensor signal during the detection of knocking in a combustion engine, in order to allow for inexpensively designed, efficient, and accurate bandpass filtering, a signal processing device ( 10 ) has an analog filter ( 20 ), a sigma-delta modulator ( 30 ) designed for analog-digital conversion, a CIC filter ( 40 ) designed to decimate the sampling rate, and a digital filter ( 50 ).
1. A device for the processing of a knock sensor signal during the detection of knocking in an internal combustion engine, comprising the following signal processing components arranged in this order:
an analog filter,
a sigma-delta modulator designed for analog-digital conversion,
a CIC filter designed to decimate the sampling rate,
wherein
downstream of the CIC filter a digital filter with bandpass characteristics is arranged, and
the CIC filter has n integrator levels and n+1 COMB levels, n being a natural number.
2. The device according to claim 1 , wherein the analog filter has a low-pass characteristic.
3. The device according to claim 1 , wherein the sigma-delta modulator is implemented in wired logic hardware.
4. The device according to claim 1 , wherein the digital filter is implemented by a program-controlled microcontroller.
5. The device according to claim 1 , wherein the CIC filter is designed to provide its output signal with a sampling rate which corresponds to 4 times the center frequency of the following digital filter.
6. The device according to claim 1 , wherein the CIC filter has an array of decimators and downstream COMB levels in order to provide multiple filtered output signals with different characteristics from each other.
7. The device according to claim 1 , wherein the sigma-delta modulator is implemented as a micro-electronically integrated circuit arrangement.
8. A method for processing of a knock sensor signal during the detection of knocking in an internal combustion engine, comprising:
an analog filtering a sensor signal,
converting said analog filtered signal by a sigma-delta modulator into a digital signal,
decimate the sampling rate of said digital signal by a CIC filter having n integrator levels and n+1 COMB levels, n being a natural number, and
digital filtering said decimated digital signal a digital filter having a bandpass characteristics.
9. The method according to claim 8 , wherein the analog filtering has a low-pass characteristic.
10. The method according to claim 8 , wherein the sigma-delta modulator is implemented in wired-logic hardware.
11. The method according to claim 8 , wherein the digital filter is implemented by a program-controlled microcontroller.
12. The method according to claim 8 , wherein the CIC filter is designed to provide its output signal with a sampling rate which corresponds to 4 times the center frequency of the following digital filter.
13. The method according to claim 8 , wherein the CIC filter has an array of decimators and downstream COMB levels in order to provide multiple filtered output signals with different characteristics from each other.
14. The method according to claim 8 , wherein the sigma-delta modulator is implemented as a micro-electronically integrated circuit arrangement.
15. An arrangement comprising:
a knock sensor;
a signal processing device receiving and processing a signal from said knock sensor and comprising:
an analog filter,
a sigma-delta modulator designed for analog-digital conversion coupled to said analog filter,
a CIC filter coupled to said sigma-delta modulator and designed to decimate the sampling rate having n integrator levels and n+1 COMB levels, n being a natural number, and
a digital filter coupled to said CIC filter with bandpass characteristics; and
an evaluation device receiving an output signal from said signal processing device.
16. The arrangement according to claim 15 , wherein the knock sensor is an accelerometer fastened to an engine block.
17. The arrangement according to claim 15 , wherein the analog filter is designed as a first-order, passive RC-low-pass filter.
18. The arrangement according to claim 15 , wherein the CIC filter comprises three integrator levels on an input side, a subsequent decimator, followed by three differentiation levels.
19. The arrangement according to claim 15 , wherein the sigma-delta modulator is implemented in wired-logic hardware.
20. The arrangement according to claim 15 , wherein the digital filter is implemented by a program-controlled microcontroller.