IP Library › Granted Patent US 8,629,448
Granted Patent B2
US 8,629,448 · App. 12/923,599 · Granted Jan 14, 2014

Flat panel display device and method of manufacturing the same

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Quick Facts
Patent No.
US 8,629,448
App. No.
12/923,599
Granted
Jan 14, 2014
Kind
B2
Abstract

A flat panel display device including a substrate including first and second regions; an active layer on the first region of the substrate including a semiconductor material; a lower electrode on the second region of the substrate including the semiconductor material; a first insulating layer on the substrate including the active layer and the lower electrode thereon; a gate electrode on the first insulating layer overlying the active layer and including a first conductive layer pattern and a second conductive layer pattern; an upper electrode on the first insulating layer overlying the lower electrode and including the first conductive layer pattern and the second conductive layer pattern; a second insulating layer on the gate electrode and the upper electrode exposing portions of the active layer and portions of the upper electrode; and a source electrode and a drain electrode connected to the exposed portions of the active layer.

Claims (16)

1. A flat panel display device, comprising:

a substrate, the substrate including a first region and a second region;

an active layer on the first region of the substrate, the active layer including a semiconductor material;

a lower electrode on the second region of the substrate, the lower electrode including the semiconductor material;

a first insulating layer on the substrate including the active layer and the lower electrode thereon;

a gate electrode on the first insulating layer, the gate electrode overlying the active layer and including a first conductive layer pattern and a second conductive layer pattern;

an upper electrode on the first insulating layer, the upper electrode overlying the lower electrode and including the first conductive layer pattern and the second conductive layer pattern;

a second insulating layer on the gate electrode and the upper electrode, the second insulating layer exposing portions of the active layer and portions of the upper electrode; and

a source electrode and a drain electrode connected to the exposed portions of the active layer,

wherein:

the second conductive layer pattern corresponding to the upper electrode includes an opening exposing a portion of the first conductive layer pattern therethrough, and

the lower electrode corresponding to the opening includes dopant ions.

2. The flat panel display device as claimed in claim 1 , wherein the semiconductor material includes amorphous silicon or a polysilicon.

3. The flat panel display device as claimed in claim 1 , wherein the first conductive layer pattern includes at least one of amorphous ITO, ITO, poly-ITO, and IZO.

4. The flat panel display device as claimed in claim 1 , wherein the second conductive layer pattern includes at least one of tungsten (W), titanium (Ti), molybdenum (Mo), silver (Ag), tantalum (Ta), aluminum (Al), copper (Cu), gold (Au), chromium (Cr), niobium (Nb), and alloys thereof.

5. The flat panel display device as claimed in claim 1 , wherein the second conductive layer pattern corresponding to the upper electrode is interposed between edges of the corresponding first conductive layer pattern and the second insulating layer thereon.