Organic light emitting diode display and method for manufacturing the same

1. An organic light emitting diode display, comprising:

a substrate main body;

a polysilicon semiconductor layer on the substrate main body;

a gate insulating layer covering the semiconductor layer; and

a gate electrode and a pixel electrode on the gate insulating layer, the gate electrode and the pixel electrode each including a transparent conductive layer portion with a gate metal layer portion on the transparent conductive layer portion, and the pixel electrode including a light emitting area having the transparent conductive layer portion and a non-light emitting area having both the transparent conductive layer portion and the gate metal layer portion.

2. The organic light emitting diode display as claimed in claim 1 , wherein:

the gate electrode is on the semiconductor layer, the transparent conductive layer portion of the gate electrode being between the gate metal layer portion of the gate electrode and the semiconductor layer, and

the semiconductor layer includes a channel region, the channel region overlapping with the gate electrode, and source and drain regions on respective sides of the channel region.

3. The organic light emitting diode display as claimed in claim 1 , further comprising:

an interlayer insulating layer on the gate electrode and the pixel electrode, the interlayer insulating layer having an opening that at least partially exposes the light emitting area of the pixel electrode; and

a source electrode and a drain electrode on the interlayer insulating layer.

4. The organic light emitting diode display as claimed in claim 3 , wherein:

the source electrode is connected to the source region of the semiconductor layer, and

the drain electrode is respectively connected to the drain region of the semiconductor layer and the non-light emitting area of the pixel electrode, the drain electrode contacting the gate metal layer portion of the pixel electrode.

5. The organic light emitting diode display as claimed in claim 3 , wherein the source electrode, the drain electrode, and the gate metal layer portion of the gate electrode are formed of a same material.

6. The organic light emitting diode display as claimed in claim 5 , further comprising a second capacitor electrode having a gate metal layer portion, wherein the source electrode, the drain electrode, the gate metal layer portion of the second capacitor electrode, and the gate metal layer portion of the gate electrode are formed of the same material.

7. The organic light emitting diode display as claimed in claim 3 , wherein the source electrode, the drain electrode, and the gate metal layer portion of the gate electrode are each a multi-layer structure that includes:

a metal layer of copper or aluminum, and

a metal layer of molybdenum.

8. The organic light emitting diode display as claimed in claim 1 , further comprising:

a first capacitor electrode, the first capacitor electrode having a polysilicon layer on a same layer as the polysilicon semiconductor layer; and

a second capacitor electrode on the first capacitor electrode, the second capacitor electrode being on a same layer as the gate electrode.

9. The organic light emitting diode display as claimed in claim 8 , wherein:

the second capacitor electrode has a gate metal layer portion, and

the gate metal layer portion of the second capacitor electrode, the gate metal layer portion of the gate electrode, and the gate metal layer portion of the pixel electrode are formed of a same material.

10. A method for manufacturing an organic light emitting diode display, the method comprising:

forming a polysilicon semiconductor layer on a substrate main body;

forming a gate insulating layer covering the semiconductor layer; and

forming a gate electrode and a pixel electrode on the gate insulating layer, the gate electrode and the pixel electrode each including a transparent conductive layer portion with a gate metal layer portion on the transparent conductive layer portion, and the pixel electrode including a light emitting area having the transparent conductive layer portion and a non-light emitting area having both the transparent conductive layer portion and the gate metal layer portion.

11. The method as claimed in claim 10 , wherein forming the gate electrode and the pixel electrode includes:

sequentially forming a transparent conductive layer and a gate metal layer on the gate insulating layer; and

patterning the transparent conductive layer and the gate metal layer to form the gate electrode and a pixel electrode intermediate, the pixel electrode intermediate having a multi-layer structure including a transparent conductive layer portion and a gate metal layer portion,

the method further comprising:

forming an interlayer insulating layer on the pixel electrode intermediate and the gate electrode;

forming an opening in the interlayer insulating layer, the opening exposing a part of the pixel electrode intermediate;

forming a data metal layer on the interlayer insulating layer;

patterning the data metal layer to form a source electrode and a drain electrode; and

removing a part of the gate metal layer portion of the pixel electrode intermediate that is exposed through the opening of the interlayer insulating layer.

12. The method as claimed in claim 11 , wherein the gate metal layer portion exposed through the opening of the interlayer insulating layer and the data metal layer are simultaneously etched and removed by a same etching process.

13. The method as claimed in claim 12 , wherein the semiconductor layer is between the substrate main body and the gate insulating layer.

14. The method as claimed in claim 13 , wherein the semiconductor layer includes a channel region that overlaps with the gate electrode, and source and drain regions formed on respective sides of the channel region.

15. The method of claim 14 , wherein contact holes that partially expose the source region and drain region of the semiconductor layer and the non-light emitting area of the pixel electrode intermediate are formed when forming the opening in the interlayer insulating layer.

16. The method as claimed in claim 13 , wherein the source electrode is connected to the source region of the semiconductor layer, and the drain electrode is respectively connected to the drain region of the semiconductor layer and the non-light emitting area of the pixel electrode.

17. The method as claimed in claim 12 , wherein the gate metal layer and the data metal layer are formed of a same material.

18. The method as claimed in claim 12 , wherein the gate metal layer portion of the gate electrode, the source electrode, and the drain electrode are each formed as a multi-layer structure that includes:

a metal layer formed of copper or aluminum, and

a metal layer formed of molybdenum.

19. The method as claimed in claim 11 , further comprising:

forming a pixel defining layer on the source electrode and the drain electrode, the pixel defining layer having an opening exposing the light emitting area of the pixel electrode;

forming an organic emission layer on the light emitting area of the pixel electrode exposed through the opening of the pixel defining layer; and

forming a common electrode on the organic emission layer.

20. The method as claimed in claim 10 , further comprising:

forming a first capacitor electrode of polysilicon on a same layer as the semiconductor layer; and

forming a second capacitor electrode of a same material as the gate electrode and on a same layer as the gate electrode.