Monolithic III-nitride power converter
View Patent ↗A power arrangement that includes a monolithically integrated III-nitride power stage having III-nitride power switches and III-nitride driver switches.
1. A power management device comprising:
a monolithic semiconductor die having a first III-nitride power semiconductor device and a second III-nitride power semiconductor device coupled to said first III-nitride power semiconductor device in a half-bridge configuration;
said half-bridge configuration including a first driver half-bridge arrangement coupled to said first III-nitride power semiconductor device, and a second driver half-bridge arrangement coupled to said second III-nitride power semiconductor device; and
said first III-nitride power semiconductor device and said second III-nitride power semiconductor device electrically isolated from each other by a barrier formed in said monolithic semiconductor die.
2. The power management device of claim 1 , wherein said first and second driver half-bridge arrangements each includes a pair of enhancement mode III-nitride switches.
3. The power management device of claim 1 , wherein said first and second driver half-bridge arrangements each includes a pair of depletion mode III-nitride switches.
4. The power management device of claim 1 , wherein said first driver half-bridge is coupled to a level shift circuit that includes a level shift capacitor, wherein said capacitor is formed on a surface of said monolithic semiconductor die.
5. The power management device of claim 1 , wherein an output node of said half-bridge configuration is coupled to a load stage that includes a driver control circuitry that generates signals for an operation of said first and second driver half-bridge arrangements.
6. The power management device of claim 5 , wherein said driver stage control circuitry generates pulse width modulation signals.
7. The power management device of claim 5 , wherein said signals are generated when an output voltage of said power stage falls outside of a pre-set range.
8. The power management device of claim 5 , wherein said signals are generated due to a load-specific condition.
9. The power management device of claim 8 , wherein said load-specific condition includes an instantaneous temperature of said load.
10. The power management device of claim 8 , wherein said load-specific condition includes a speed of said load.
11. The power management device of claim 1 , further comprising a load stage, wherein said load stage and said monolithic semiconductor die are integrated.
12. The power management device of claim 11 , wherein said load stage includes a microprocessor.
13. The power management device of claim 11 , wherein said load stage includes a memory device.