Semiconductor device and method for fabricating the same
View Patent ↗A fin-type semiconductor region ( 103 ) is formed on a substrate ( 101 ), and then a resist pattern ( 105 ) is formed on the substrate ( 101 ). An impurity is implanted into the fin-type semiconductor region ( 103 ) by a plasma doping process using the resist pattern ( 105 ) as a mask, and then at least a side of the fin-type semiconductor region ( 103 ) is covered with a protective film ( 107 ). Thereafter, the resist pattern ( 105 ) is removed by cleaning using a chemical solution, and then the impurity implanted into the fin-type semiconductor region ( 103 ) is activated by heat treatment.
1. A method for fabricating a semiconductor device, the method comprising steps of:
(a) forming a fin-type semiconductor region on a substrate;
(b) after the step (a), forming a resist pattern on the substrate;
(c) implanting an impurity into the fin-type semiconductor region by a plasma doping process using the resist pattern as a mask;
(d) after the step (c), covering at least a side of the fin-type semiconductor region with a protective film;
(e) after the step (d), removing the resist pattern by cleaning with a chemical solution; and
(f) after the step (e), activating the impurity implanted into the fin-type semiconductor region by heat treatment.
2. The method of claim 1 , wherein
in the step (d), the protective film also covers a top surface of the resist pattern, and
the method further includes, between the steps (d) and (e), at least partially removing a portion of the protective film located on the top surface of the resist pattern.
3. The method of claim 1 , wherein
in the step (d), a porous film is formed as the protective film.
4. The method of claim 1 , wherein
in the step (d), the protective film is formed at a temperature of equal to or less than 100° C.
5. The method of claim 1 , wherein
the protective film contains a same element as the impurity.
6. The method of claim 1 , wherein
a thickness of the protective film is greater than or equal to 0.5 nm and less than or equal to 10 nm.
7. The method of claim 1 , wherein
after the step (c), the step (d) is performed without exposure to atmosphere.
8. The method of claim 7 , wherein
the steps (c) and (d) are successively performed in a same chamber.
9. The method of claim 1 further comprising
between the steps (a) and (b), forming a gate electrode astride the fin-type semiconductor region,
wherein in the step (d), the protective film is formed on at least a side of the gate electrode, and
the method further includes, after the step (e), forming an insulative sidewall spacer on the side of the gate electrode with the protective film interposed between the sidewall spacer and the gate electrode.