Crystal control scheme to improve performance of a receiver
View Patent ↗A circuit includes, in part, a receiver, a received signal strength indicator (RSSI), and an oscillator. The receiver receives an incoming signal and an oscillating signal. The RSSI is responsive to the receiver and generates an output signal representative of the strength of the incoming signal. The oscillator receives different biasing conditions in response to different outputs of the RSSI. The oscillator generates the oscillating signal received by the receiver. The oscillator receives a first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value and a second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value. The first biasing condition may be defined by a first current, and the second biasing condition may be defined by a sum of the first current and a second current.
1. A circuit comprising:
a receiver receiving an incoming signal and an oscillating signal;
a received signal strength indicator (RSSI) responsive to the receiver and adapted to generate an output signal representative of a strength of the incoming signal; and
an oscillator adapted to receive different biasing conditions in response to different output signals of the RSSI, said oscillator generating the oscillating signal, wherein a first biasing condition is defined by a first current, and wherein a second biasing condition is defined by a sum of the first current and a second current.
2. The circuit of claim 1 wherein the oscillator receives the first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value and the second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value.
3. The circuit of claim 1 wherein the output signal of the RSSI is in a first state when the incoming signal is detected as having a strength higher than a predetermined threshold value and a second state when the incoming signal is detected as having a strength equal to or less than the predetermined threshold value.
4. The circuit of claim 1 wherein the circuit further comprises a control loop adapted to supply a reference clock signal to the oscillator in response to the output signal of the RSSI.
5. The circuit of claim 4 wherein said control loop is selected from a group consisting of a phased-locked loop, a delay-locked loop, and a frequency-locked loop.
6. The circuit of claim 4 wherein said circuit is a wireless receiving circuit.
7. The circuit of claim 6 wherein said oscillator is a crystal oscillator.
8. A method of controlling a biasing condition of an oscillator, the method comprising:
receiving an incoming signal and an oscillating signal;
generating an output signal representative of a strength of the incoming signal; and
varying the biasing condition applied to the oscillator in response to the output signal, said oscillator generating the oscillating signal, wherein a first biasing condition is defined by a first current, and wherein a second biasing condition is defined by a sum of the first current and a second current.
9. The method of claim 8 further comprising:
applying the first biasing condition when the incoming signal is detected as having a strength lower than or equal to a predetermined threshold value; and
applying the second biasing condition when the incoming signal is detected as having a strength higher than the predetermined threshold value.
10. The method of claim 8 further comprising:
placing the output signal in a first state when the incoming signal is detected as having a strength higher than a predetermined threshold value; and
placing the output signal in a second state when the incoming signal is detected as having a strength equal to or less than the predetermined threshold value.
11. The method of claim 8 further comprising:
using a control loop to supply a reference clock signal to the oscillator in response to the output signal.
12. The method of claim 11 wherein said control loop is selected from a group consisting of a phased-locked loop, a delay-locked loop, and a frequency-locked loop.
13. The circuit of claim 11 wherein said incoming signal is a wireless signal received via an antenna.
14. The circuit of claim 13 wherein said oscillator is a crystal oscillator.