IP Library Granted Patent US 8,426,287
Granted Patent B2
US 8,426,287 · App. 12/945,255 · Granted Apr 23, 2013

Method of manufacturing semiconductor device, solid-state imaging device, and solid-state imaging apparatus

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Quick Facts
Patent No.
US 8,426,287
App. No.
12/945,255
Granted
Apr 23, 2013
Kind
B2
Abstract

A method of manufacturing a semiconductor device includes the steps of forming a gate electrode of a transistor on an insulator layer on a surface of a semiconductor substrate, forming an isolation region by performing ion implantation of an impurity of a first conductivity type into the semiconductor substrate, forming a lightly doped drain region by performing, after forming a mask pattern including an opening portion narrower than a width of the gate electrode on an upper layer of the gate electrode of the transistor, ion implantation of an impurity of a second conductivity type near the surface of the semiconductor substrate with the mask pattern as a mask, and forming a source region and a drain region of the transistor by performing ion implantation of an impurity of the second conductivity type into the semiconductor substrate after forming the gate electrode of the transistor.

Claims (13)

1. A method of manufacturing a semiconductor device comprising:

forming a gate electrode of a transistor on an insulator layer on a surface of a semiconductor substrate;

forming an isolation region by performing ion implantation of an impurity of a first conductivity type into the semiconductor substrate;

forming a lightly doped drain region by performing, after forming a mask pattern including an opening portion narrower than a width of the gate electrode on an upper layer of the gate electrode of the transistor, ion implantation of an impurity of a second conductivity type near the surface of the semiconductor substrate with the mask pattern as a mask; and

forming a source region and a drain region of the transistor by performing ion implantation of an impurity of the second conductivity type into the semiconductor substrate after forming the gate electrode of the transistor.

2. The method of manufacturing a semiconductor device according to claim 1 , wherein the isolation region is formed after the gate electrode of the transistor is formed.

3. The method of manufacturing a semiconductor device according to claim 1 or 2 , wherein the ion implantation of the impurity of the second conductivity type is performed in a state where the isolation region is covered with the mask when the lightly doped drain region is formed.

4. A semiconductor device comprising:

an isolation region which is an impurity region of a first conductivity type;

a source region and a drain region of a transistor which are impurity regions of a second conductivity type;

a gate electrode of the transistor which is provided on an insulator layer on a surface of a semiconductor substrate formed with the isolation region and the source region and the drain region of the transistor; and

a lightly doped drain region of the second conductivity type which is provided near the surface of the semiconductor substrate in a region narrower than a width of the gate electrode of the transistor.

5. The semiconductor device according to claim 4 , wherein a width of the lightly doped drain region is approximately equivalent to a width of the source region and the drain region of the transistor or narrower than the width of the source region and the drain region of the transistor.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →