IP Library Granted Patent US 8,114,801
Granted Patent B2
US 8,114,801 · App. 12/945,932 · Granted Feb 14, 2012

COG dieletric composition for use with nickel electrodes

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Quick Facts
Patent No.
US 8,114,801
App. No.
12/945,932
Granted
Feb 14, 2012
Kind
B2
Abstract

Multilayer ceramic chip capacitors which satisfy COG requirements and which are compatible with reducing atmosphere sintering conditions so that non-noble metals such as nickel and nickel alloys thereof may be used for internal and external electrodes are made in accordance with the invention. The capacitors exhibit desirable dielectric properties (high capacitance, low dissipation factor, high insulation resistance), excellent performance on highly accelerated life testing, and very good resistance to dielectric breakdown. The dielectric layers comprise a strontium zirconate matrix doped with other metal oxides such as TiO 2 , MgO, B 2 O 3 , CaO, Al 2 O 3 , SiO 2 , and SrO in various combinations.

Claims (37)

1. A lead-free and cadmium-free dielectric paste comprising a solids portion wherein the solids portion comprises, prior to firing:

a. about 44.2 wt % to about 45.6 wt % SrO,

b. about 50.2 wt % to about 51.8 wt % ZrO 2 ,

c. about 0.1 wt % to about 0.4 wt % MgO,

d. about 1.5 wt % to about 1.6 wt % TiO 2 ,

e. about 0.3 to about 1.2 wt % Al 2 O 3 ,

f. about 0.5 to about 2.2 wt % SiO 2 , and

g. up to about 0.3 wt % CaO.

2. A method of forming an electronic component comprising:

a. applying the dielectric paste of claim 1 to a substrate and

b. firing the substrate at a temperature sufficient to sinter the dielectric material.

3. The method of claim 2 wherein the firing is conducted at a temperature of 1200° C.-1350° C., and in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

4. A multilayer ceramic chip capacitor comprising a fired collection of:

a. alternately stacked layers of the dielectric material of claim 1 and

b. layers of an internal electrode material comprising a transition metal other than Ag, Au, Pd, or Pt.

5. The multilayer ceramic chip capacitor of claim 4 wherein the internal electrode material comprises nickel.

6. A method of forming an electronic component comprising:

a. alternately applying layers of

i. an oxide-containing dielectric material comprising the paste of claim 1 and

ii. a metal-containing electrode paste onto

iii. a substrate to form a laminar stack,

b. firing the substrate at a temperature sufficient to sinter the dielectric material,

c. cutting the laminar stack to a predetermined shape,

d. separating the cut stack from the substrate, and

e. firing the stack to sinter the metal in the electrode and fuse the oxides in the dielectric material, wherein the internal electrode and the dielectric material each have a layer thickness.

7. The method of claim 6 wherein the layers of dielectric material, after firing, have a thickness of about 1 microns to about 50 microns.

8. The method of claim 6 wherein the firing is conducted at a temperature of 1200° C. to about 1325° C.

9. The method of claim 6 wherein the firing is conducted in an atmosphere having a partial oxygen pressure of about 10 −12 atm to about 10 −8 atm.

10. The method of claim 6 wherein the metal-containing electrode paste comprises nickel.

11. A lead-free and cadmium-free dielectric paste comprising a solids portion wherein the solids portion consists essentially of, prior to firing:

a. about 44.2 wt % to about 45.6 wt % SrO,

b. about 50.2 wt % to about 51.8 wt % ZrO 2 ,

c. about 0.1 wt % to about 0.4 wt % MgO,

d. about 1.5 wt % to about 1.6 wt % TiO 2 ,

e. about 0.3 to about 1.2 wt % Al 2 O 3 ,

f. about 0.5 to about 2.2 wt % SiO 2 , and

g. up to about 0.3 wt % CaO.

Assignments (5)
SECURITY INTEREST Recorded May 2, 2022
From: CHROMAFLO TECHNOLOGIES CORPORATION; FERRO CORPORATION; FERRO ELECTRONIC MATERIALS INC.; PRINCE ENERGY LLC; PRINCE MINERALS LLC; PRINCE SPECIALTY PRODUCTS LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH, AS ADMINISTRATIVE AGENT
Reel/Frame 059845/0082 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT R/F 041736/0178 Recorded Apr 21, 2022
From: PNC BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: FERRO CORPORATION
Reel/Frame 059747/0129 →
SECURITY INTEREST Recorded Feb 16, 2017
From: FERRO CORPORATION
To: PNC BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 041736/0178 →
RELEASE OF SECURITY INTEREST Recorded Feb 15, 2017
From: PNC BANK, NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: FERRO CORPORATION
Reel/Frame 041718/0307 →
PATENT SECURITY AGREEMENT Recorded Aug 12, 2014
From: FERRO CORPORATION
To: PNC BANK, NATIONAL ASSOCIATION
Reel/Frame 033522/0966 →