IP Library Granted Patent US 8,773,343
Granted Patent B2
US 8,773,343 · App. 12/946,969 · Granted Jul 8, 2014

LCD wherein the polarity of the final subfield of a field is kept the same as the polarity of first subfield of the next subfield by inverting the polarity of the capacitive potential lines twice during the final subfield

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Quick Facts
Patent No.
US 8,773,343
App. No.
12/946,969
Granted
Jul 8, 2014
Kind
B2
Abstract

A liquid crystal device includes a capacitive electric potential line driving circuit that supplies one of a low-level and a high-level electric potential as a capacitive electric potential to each of the capacitive electric potential lines, reverses polarity of the capacitive electric potential as a write period for the row corresponding to the corresponding capacitive electric potential line is terminated in each subfield period included in a unit period, and, in a final subfield period included in the unit period, reverses polarity of the capacitive electric potential again at the time period of after reversing the polarity of the capacitive electric potential until terminating the corresponding final subfield period.

Claims (25)

1. A liquid crystal device comprising:

signal lines;

scanning lines;

capacitive electric potential lines;

pixels corresponding to each intersection of the signal lines and the scanning lines, each of the pixels including a selection switch, a pixel electrode, and a retentive capacitor interposed between the pixel electrode and one of the capacitive electric potential lines;

a signal line driving circuit that supplies one of a first electric potential and a second electric potential to the signal lines in a write period included in each of subfield periods of a unit period, the unit period including even-numbered subfield periods having at least different lengths;

a scanning line driving circuit that sequentially selects the scanning lines and supplies a scanning signal for turning on the selection switch in each write period; and

a capacitive electric potential line driving circuit that supplies one of a low-level electric potential and a high-level electric potential as a capacitive electric potential to each of the capacitive electric potential lines, reverses polarity of the capacitive electric potential as the write period for the row corresponding to the corresponding capacitive electric potential line is terminated in each subfield period included in the unit period, and, in a final subfield period included in the unit period, reverses polarity of the capacitive electric potential again at the time period of after reversing the polarity of the capacitive electric potential until terminating the corresponding final subfield period;

wherein the liquid crystal device is configured such that the polarity of the capacitive electric potential of the final subfield period is reversed twice during said final subfield period so that the polarity of the capacitive electric potential of the write period in said final subfield period is the same as the polarity of the capacitive electric potential of the write period of a subfield period consecutive to said final subfield period.

2. The liquid crystal device according to claim 1 , further comprising a polarity signal generation circuit that generates a first polarity signal and a second polarity signal,

the capacitive electric potential line driving circuit

selects either one of the low-level electric potential and the high-level electric potential as the capacitive electric potential based on the first polarity signal in the write period assigned by the scanning signal corresponding to a row preceding a single row from the row of the corresponding capacitive electric potential line,

maintains the immediately previous capacitive electric potential in the write period of the corresponding row, and

in the write period assigned by the scanning signal corresponding to the row following the row of the corresponding capacitive electric potential line by a single row, selects one of the low-level electric potential and the high-level electric potential as the capacitive electric potential based on a second polarity signal.

3. The liquid crystal device according to claim 2 , wherein the capacitive electric potential line driving circuit includes a sampling circuit provided in each of the capacitive electric potential lines, and a selection circuit that selects one of the low-level electric potential and the high-level electric potential based on output signals of the sampling circuit,

wherein the sampling circuit includes

a first switch having one terminal to which the first polarity signal is supplied and the other terminal connected to a first node,

a second switch having one terminal to which the first node is connected,

a third switch having one terminal to which the second polarity signal is supplied and the other terminal connected to the first node,

a buffer circuit having an input terminal connected to the first node and an output terminal connected to a second node, and

a fourth switch having one terminal connected to the second node and the other terminal connected to the other terminal of the second switch, and

wherein control terminals of the first and second switches are supplied with the scanning signal corresponding to a row preceding a single row from the row of the corresponding capacitive electric potential line to exclusively turn on the first and second switches, and

control terminals of the first and third switches are supplied with the scanning signal corresponding to a row following a single row from the row of the corresponding capacitive electric potential line to exclusively turn on the third and fourth switches.

4. The liquid crystal device according to claim 3 , further comprising a polarity signal supply circuit that interchanges the first polarity signal with the second polarity signal in synchronization with a selection direction for a plurality of scanning lines.

5. An electronic apparatus comprising a liquid crystal device according to claim 1 .

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2024
From: SEIKO EPSON CORPORATION
To: 138 EAST LCD ADVANCEMENTS LIMITED
Reel/Frame 067131/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2010
From: FUJIKAWA, SHINSUKE
To: SEIKO EPSON CORPORATION
Reel/Frame 025366/0995 →