Backup memory administration using an active memory device and a backup memory device

1. A system for backup memory administration, the system comprising:

random access memory;

a memory backup controller coupled to the random access memory, wherein the memory backup controller is configured to:

store in an active memory device blocks of computer data received from the random access memory, wherein the active memory device comprises a first flash memory and is communicably coupled to the memory backup controller via a memory device adapter by a first connector connecting the active memory device to the memory device adapter;

record in a change log identifications of each block of computer data that is stored in the active memory device;

detect a backup trigger event;

responsive to the detecting of the backup trigger event: copy from the active memory device, to a backup memory device, the blocks of data identified in the change log, wherein the backup memory device comprises a second flash memory and is communicably coupled to the memory backup controller via the memory device adapter by a second connector connecting the backup memory device to the memory device adapter, wherein the first connector and the second connector are independent of each other; and clear the change log, wherein the backup trigger event is triggered in response to one of a change in a power state of a processor and a change in the power state of the memory backup controller;

in response to detecting a bad block of data in the active memory device: cease usage of the bad block in the active memory device, switch a designation of the backup memory device from backup usage to active usage; and switch a designation of the active memory device from active usage to backup usage, wherein detecting the bad block in the active memory device includes detecting at least one of a single bit error and a multi-bit error.

2. The system of claim 1 , wherein the memory backup controller is further configured to:

receive additional blocks of computer data from the random access memory;

responsive to the designations of the active memory device and the backup memory device, store the additional blocks of computer data on a memory device designated as being in active usage.

3. The system of claim 1 , further comprising an expansion bus, wherein the memory backup controller is coupled to a processor through the expansion bus.

4. The system of claim 3 , wherein the expansion bus includes a type selected from the group consisting of a universal serial bus (USB), a small computer system interface (SCSI) bus, a peripheral component interconnect express (PCIe) bus, and a parallel attachment packet interface (ATAPI) bus.

5. The system of claim 1 , wherein detecting the bad block in the active memory device further comprises receiving error correction codes (ECC) data from the active memory device indicating one of a single bit error and a multi-bit error.

6. A computer program product for backup memory administration, the computer program product comprising:

a computer readable storage medium having computer readable program code embodied therewith, wherein the computer readable storage medium is not a signal, the computer readable program code comprising:

computer readable program code configured to:

store in an active memory device, by a memory backup controller, blocks of computer data received from random access memory, wherein the active memory device comprises a first flash memory and is communicably coupled to the memory backup controller via a memory device adapter by a first connector connecting the active memory device to the memory device adapter;

record in a change log identifications of each block of computer data that is stored in the active memory device;

detect a backup trigger event;

responsive to the detecting of the backup trigger event: copy from the active memory device, to a backup memory device, the blocks of data identified in the change log, wherein the backup memory device comprises a second flash memory and is communicably coupled to the memory backup controller via the memory device adapter by a second connector connecting the backup memory device to the memory device adapter, wherein the first connector and the second connector are independent of each other;

clear the change log, wherein the backup trigger event is triggered in response to one of a change in a power state of a processor and a change in the power state of the memory backup controller; and

in response to detecting a bad block of data in the active memory device: cease usage of the bad block in the active memory device, switch a designation of the backup memory device from backup usage to active usage; and switch a designation of the active memory device from active usage to backup usage, wherein detecting the bad block in the active memory device includes detecting at least one of a single bit error and a multi-bit error.

7. The computer program product of claim 6 , wherein the computer readable program code is further configured to:

receive additional blocks of computer data from the random access memory;

responsive to designations of the active memory device and the backup memory device, store the additional blocks of computer data on a memory device designated as being in active usage.

8. The computer program product of claim 6 , wherein detecting the bad block in the active memory device further comprises receiving error correction codes (ECC) data from the active memory device indicating one of a single bit and a multi-bit error.