Semiconductor device
View Patent ↗Disclosed is a semiconductor device including transistors B on an output side of a current mirror, arranged uniformly in a surrounding area of a transistor A on an input side of the current mirror. The transistors B are arranged at equal distances, adjacently to the transistor A, on both sides of the transistor A.
1. A semiconductor device including a current mirror circuit, the current mirror circuit comprising:
a first MOS transistor including source and drain electrodes coupled between first and second nodes, and a gate electrode coupled to the first node, whereby the gate electrode of the first MOS transistor is directly coupled to one of the source and drain electrodes via the first node;
a second MOS transistor including source and drain electrodes coupled between third and fourth nodes, and a gate electrode coupled to the first node; and
a third MOS transistor including source and drain electrodes coupled between fifth and sixth nodes, and a gate electrode coupled to the first node,
wherein the first MOS transistor is arranged between the second and third MOS transistor.
2. The semiconductor device as claimed in claim 1 , wherein a distance between the first MOS transistor and the second MOS transistor is substantially same as a distance between the first MOS transistor and the third MOS transistor.
3. The semiconductor device as claimed in claim 2 , wherein the second and third MOS transistors are arranged to be symmetrical with respect to a point where the first MOS transistor is provided.
4. The semiconductor device as claimed in claim 3 , the current mirror further comprising:
fourth and fifth MOS transistors each including a gate electrode coupled to the first node,
wherein the fourth and fifth MOS transistors are arranged between the first MOS transistor.
5. The semiconductor device as claimed in claim 4 ,
wherein the first to third MOS transistors are arranged on a first line, and
wherein the fourth and fifth MOS transistors and the first MOS transistors are arranged on a second line different from the first line.
6. The semiconductor device as claimed in claim 5 , wherein the fourth and fifth MOS transistors are arranged to be symmetrical with respect to the point where the first MOS transistor is provided.
7. The semiconductor device as claimed in claim 6 , wherein the distance between the first MOS transistor and the second MOS transistor is substantially same as a distance between the first MOS transistor and the fourth MOS transistor.
8. The semiconductor device as claimed in claim 6 , wherein the distance between the first MOS transistor and the second MOS transistor is different from a distance between the first MOS transistor and the fourth MOS transistor.
9. The semiconductor device as claimed in claim 1 , wherein the gate electrode of each of the first to third MOS transistors extends in a same direction.
10. The semiconductor device as claimed in claim 1 , wherein each of the first to third MOS transistors has substantially the same size.