Radio frequency front end circuit
A RF front end circuit includes a processor, a main receiving (Rx) path and an adjustment path connected between the processor and an external antenna array in parallel, and a coupling module coupled with the main Rx path. The adjustment path includes an adjustment transmitting (Tx) path, an adjustment Rx path, and a DSP. The adjustment Tx path includes a coupling switch. When the circuit operates in an adjustment mode, the switch is connected to the coupling module, the adjustment Rx path receives and demodulates a first analog signal, the DSP converts the first analog signal to a digital signal, clipping a peak of the digital signal, and converts the digital signal to a second analog signal, the adjustment Tx path modulates and reverses the phase of the second analog signal, and the coupling module couples the second analog signal to the main Rx path to counteract noise received thereby.
1. A radio frequency (RF) front end circuit connected to an external antenna array, the RF front end circuit comprising:
a processor;
a main receiving (Rx) path and an adjustment path connected between the processor and the external antenna array in parallel, the adjustment path comprising an adjustment transmitting (Tx) path, an adjustment Rx path, and a digital signal processing module (DSP), the adjustment Tx path comprising a coupling switch; and
a coupling module with a first end coupled to the main Rx path, and a second end connected to the coupling switch; wherein
the RF front end circuit is selectively operable in a normal mode or an adjustment mode under control of the processor;
when the RF front end circuit operates in the normal mode, the main Rx path and the adjustment Rx path respectively receive and process signals from the external antenna array independently; and
when the RF front end circuit operates in the adjustment mode, the processor directs the coupling switch to connect the coupling module to the adjustment Tx path, the adjustment Rx path receives and demodulates a first analog signal from the antenna array, and transmits the first analog signal to the DSP, the DSP converts the first analog signal to a digital signal, clips a peak part of the digital signal, converts the digital signal to a second analog signal, and transmits the second analog signal to the adjustment Tx path, the adjustment Tx path modulates and reverses the phase of the second analog signal, and transmits the second analog signal to the coupling module, and the coupling module couples the second analog signal to the main Rx path to counteract a noise received by the main Rx path.
2. The RF front end circuit of claim 1 , wherein the DSP clips a peak of the digital signal by firstly dividing the digital signal into an amplitude component and a frequency component by a fast Fourier transform (FFT) method, then limiting the amplitude of the amplitude component, and finally combining the amplitude component and the frequency component by an inverse fast Fourier transform (IFFT) method.
3. The RF front end circuit of claim 2 , wherein the DSP limits the amplitude of the amplitude component by setting a threshold value, comparing the amplitude of the amplitude component with the threshold value, and reducing the amplitude to the threshold value if the amplitude exceeds the threshold value.
4. The RF front end circuit of claim 1 , wherein the DSP comprises an analog to digital converter (ADC) connected to the adjustment Rx path and a digital to analog converter (DAC) connected to the adjustment Tx path.
5. The RF front end circuit of claim 1 , wherein the adjustment Rx path comprises a first synthesizer configured for demodulating the first analog signal.
6. The RF front end circuit of claim 1 , wherein the adjustment Tx path comprises a second synthesizer configured for modulating the second analog signal.
7. The RF front end circuit of claim 1 , wherein the adjustment Tx path comprises a phase shifter configured for reversing the phase of the second analog signal.
8. The RF front end circuit of claim 1 , wherein the coupling module comprises a coupler and a resistor connected in series.
9. The RF front end circuit of claim 1 , wherein the processor directs the RF front end circuit to operate in the normal mode or in the adjustment mode according to an instruction input by a user.
10. The RF front end circuit of claim 1 , wherein the processor automatically directs the RF front end circuit to operate in the normal mode or in the adjustment mode according to a communication rate of the RF front end circuit.
11. A radio frequency (RF) front end circuit for connection to an external antenna array, the RF front end circuit comprising:
a processor;
a main receiving (Rx) path and an adjustment path connected to the processor, and capable of connection to the external antenna array in parallel, the adjustment path comprising an adjustment transmitting (Tx) path, an adjustment Rx path, and a digital signal processing module (DSP), the adjustment Tx path comprising a coupling switch; and
a coupling module with a first end coupled to the main Rx path, and a second end connected to the coupling switch; wherein
the RF front end circuit is selectively operable in a normal mode or an adjustment mode under control of the processor;
when the RF front end circuit operates in the normal mode, the main Rx path and the adjustment Rx path are capable of respectively receiving and processing signals from the external antenna array independently; and
when the RF front end circuit operates in the adjustment mode, the processor directs the coupling switch to connect the coupling module to the adjustment Tx path, the adjustment Rx path is capable of receiving and demodulating a first analog signal from the antenna array, and transmitting the first analog signal to the DSP, the DSP converts the first analog signal to a digital signal, clips a peak part of the digital signal, converts the digital signal to a second analog signal, and transmits the second analog signal to the adjustment Tx path, the adjustment Tx path modulates and reverses the phase of the second analog signal, and transmits the second analog signal to the coupling module, and the coupling module couples the second analog signal to the main Rx path to counteract a noise received by the main Rx path.
12. The RF front end circuit of claim 11 , wherein the DSP clips a peak of the digital signal by firstly dividing the digital signal into an amplitude component and a frequency component by a fast Fourier transform (FFT) method, then limiting the amplitude of the amplitude component, and finally combining the amplitude component and the frequency component by an inverse fast Fourier transform (IFFT) method.
13. The RF front end circuit of claim 12 , wherein the DSP limits the amplitude of the amplitude component by setting a threshold value, comparing the amplitude of the amplitude component with the threshold value, and reducing the amplitude to the threshold value if the amplitude exceeds the threshold value.
14. The RF front end circuit of claim 11 , wherein the DSP comprises an analog to digital converter (ADC) connected to the adjustment Rx path and a digital to analog converter (DAC) connected to the adjustment Tx path.
15. The RF front end circuit of claim 11 , wherein the adjustment Rx path comprises a first synthesizer configured for demodulating the first analog signal.
16. The RF front end circuit of claim 11 , wherein the adjustment Tx path comprises a second synthesizer configured for modulating the second analog signal.
17. The RF front end circuit of claim 11 , wherein the adjustment Tx path comprises a phase shifter configured for reversing the phase of the second analog signal.
18. The RF front end circuit of claim 11 , wherein the coupling module comprises a coupler and a resistor connected in series.
19. The RF front end circuit of claim 11 , wherein the processor directs the RF front end circuit to operate in the normal mode or in the adjustment mode according to an instruction input by a user.
20. The RF front end circuit of claim 11 , wherein the processor automatically directs the RF front end circuit to operate in the normal mode or in the adjustment mode according to a communication rate of the RF front end circuit.