IP Library Granted Patent US 8,406,705
Granted Patent B2
US 8,406,705 · App. 12/954,872 · Granted Mar 26, 2013

Circuit and method

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Quick Facts
Patent No.
US 8,406,705
App. No.
12/954,872
Granted
Mar 26, 2013
Kind
B2
Abstract

Implementations related to circuits including an oscillator and a switch-mode DC/DC converter are presented herein.

Claims (37)

1. A circuit, comprising:

an oscillator configured to provide a first signal having a first frequency;

a frequency converter coupled to the oscillator, and configured to convert the first signal to a second signal having a second frequency equal to a sum of the first frequency and an offset frequency; and

a switch-mode DC/DC converter coupled to the frequency converter, and configured to convert a first voltage to a second voltage, wherein the DC/DC converter is controlled by the second signal.

2. The circuit of claim 1 , wherein a switching frequency of the DC/DC converter is controlled by the second signal.

3. The circuit of claim 1 , wherein the second frequency is locked to the first frequency.

4. The circuit of claim 1 , wherein the oscillator comprises a voltage-controlled or digitally controlled oscillator.

5. The circuit of claim 1 , wherein the oscillator and the DC/DC converter are integrated in the same integrated circuit.

6. A receiver circuit, comprising:

a frequency synthesizer to provide a first signal having a first frequency;

a down-conversion mixer coupled to the frequency synthesizer, and configured to mix a received signal with the first signal;

a frequency converter coupled to the frequency synthesizer, and configured to convert the first signal to a second signal having a second frequency; and

a switch-mode DC/DC converter coupled to the frequency converter and integrated in a common integrated circuit therewith, and configured to convert a first voltage to a second voltage, wherein the DC/DC converter is controlled by the second signal.

7. The receiver circuit of claim 6 , wherein the second frequency is locked to the first frequency.

8. The receiver circuit of claim 6 , wherein the frequency synthesizer and the DC/DC converter are integrated in the same integrated circuit.

9. The receiver circuit of claim 6 , wherein the second frequency is M/N times the first frequency, M and N are integers, and wherein M≠N.

10. The receiver circuit of claim 6 , wherein the frequency synthesizer comprises a voltage-controlled oscillator or a digitally controlled oscillator.

11. The receiver circuit of claim 6 , wherein the first signal has a first frequency bandwidth and the second signal has a second frequency bandwidth, and wherein the first and second frequency bandwidths do not overlap.

12. The receiver circuit of claim 6 , wherein the DC/DC converter is self-oscillating.

13. A transceiver circuit, comprising:

a first frequency synthesizer configured to provide a first signal having a first frequency;

an up-conversion mixer coupled to the first frequency synthesizer, and configured to mix a signal to be transmitted with the first signal;

a second frequency synthesizer configured to provide a second signal having a second frequency;

a down-conversion mixer coupled to the second frequency synthesizer, and configured to mix a received signal with the second signal;

a first frequency converter coupled to the first frequency synthesizer, and configured to convert the first signal to a third signal having a third frequency; and

a first switch-mode DC/DC converter coupled to the first frequency converter, and configured to convert a first voltage to a second voltage, wherein the first DC/DC converter is controlled by the third signal.

14. The transceiver of claim 13 , further comprising:

a second frequency converter coupled to the second frequency synthesizer, and configured to convert the second signal to a fourth signal having a fourth frequency; and

a second switch-mode DC/DC converter coupled to the second frequency converter, and configured to convert a third voltage to a fourth voltage, wherein the second DC/DC converter is controlled by the fourth signal.

15. The transceiver circuit of claim 13 , wherein the first and second frequency synthesizers and the first and second DC/DC converters are integrated in the same integrated circuit.

16. A method comprising:

providing a first signal having a first frequency;

down-converting a received signal by mixing it with the first signal;

converting the first signal to a second signal having a second frequency equal to a sum of the first frequency and an offset frequency; and

converting a first DC voltage to a second DC voltage, wherein the voltage conversion is controlled by the second signal.

17. The method of claim 16 , wherein the second frequency is locked to the first frequency.

18. The method of claim 16 , wherein the second frequency is M/N times the first frequency, M and N are integers, and wherein M≠N.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2020
From: INTEL CORPORATION
To: APPLE INC.
Reel/Frame 053518/0765 →
CONFIRMATORY ASSIGNMENT EFFECTIVE AS OF JANUARY 1, 2018 Recorded Aug 12, 2020
From: INTEL DEUTSCHLAND GMBH
To: INTEL CORPORATION
Reel/Frame 053477/0121 →
CHANGE OF NAME Recorded Nov 6, 2015
From: INTEL MOBILE COMMUNICATIONS GMBH
To: INTEL DEUTSCHLAND GMBH
Reel/Frame 037057/0061 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2012
From: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
To: INTEL MOBILE COMMUNICATIONS GMBH
Reel/Frame 027556/0709 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 18, 2012
From: INFINEON TECHNOLOGIES AG
To: INTEL MOBILE COMMUNICATIONS TECHNOLOGY GMBH
Reel/Frame 027548/0623 →