IP Library Granted Patent US 8,384,080
Granted Patent B2
US 8,384,080 · App. 12/964,852 · Granted Feb 26, 2013

Thin film transistor, display device, and electronic device

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Quick Facts
Patent No.
US 8,384,080
App. No.
12/964,852
Granted
Feb 26, 2013
Kind
B2
Abstract

A thin film transistor, which is capable of improving carrier mobility, and a display device and an electronic device, each of which uses the thin film transistor, are provided. The thin film transistor includes: a gate electrode; an oxide semiconductor layer including a multilayer film including a carrier travel layer configuring a channel and a carrier supply layer for supplying carriers to the carrier travel layer; a gate insulating film provided between the gate electrode and the oxide semiconductor layer; and a pair of electrodes as a source and a drain. A conduction band minimum level or a valence band maximum level corresponding to a carrier supply source of the carrier supply layer is higher in energy than a conduction band minimum level or a valence band maximum level corresponding to a carrier supply destination of the carrier travel layer.

Claims (28)

1. A thin film transistor comprising:

a gate electrode;

an oxide semiconductor layer including a multilayer film, the multiplayer film including a carrier travel layer acting as a channel and a carrier supply layer for supplying carriers to the carrier travel layer;

a gate insulating film provided between the gate electrode and the oxide semiconductor layer; and

a pair of electrodes acting as a source and a drain respectively,

wherein,

the carrier supply layer has a higher conduction band minimum energy level than that of the carrier travel layer, or

the carrier supply layer has a higher valence band maximum energy level than that of the carrier travel layer.

2. The thin film transistor according to claim 1 , wherein the oxide semiconductor layer includes a high-resistance layer between the carrier travel layer and the carrier supply layer, the high-resistance layer having a relatively low carrier concentration.

3. The thin film transistor according to claim 1 , wherein the oxide semiconductor layer includes a single heterostructure, the single heterostructure having the carrier travel layer and the carrier supply layer, each layer being a single layer.

4. The thin film transistor according to claim 1 , wherein the oxide semiconductor layer includes a double heterostructure, the double heterostructure having a pair of carrier supply layers on a top and a bottom of one carrier travel layer, respectively.

5. The thin film transistor according to claim 1 , wherein the oxide semiconductor layer includes a double heterostructure, the double heterostructure having a pair of carrier travel layers on a top and a bottom of one carrier supply layer, respectively.

6. The thin film transistor according to claim 1 , wherein:

the carriers are electrons, and

a conduction band minimum level of the carrier supply layer is higher in energy than a conduction band minimum level of the carrier travel layer.

7. The thin film transistor according to claim 1 , wherein:

the carriers are holes, and

the carrier supply layer has a higher valence band maximum energy level than that of the carrier travel layer.

8. The thin film transistor according to claim 1 , wherein the carrier supply layer comprises Al x Ga y In z O 1.5x+1.5y+1.5z (x, y, z: integer).

9. The thin film transistor according to claim 8 , wherein the carrier travel layer comprises Al x Ga y In z O 1.5x+1.5y+1.5z (x, y, z: integer).

10. The thin film transistor according to claim 1 , wherein at least one layer of the multilayer film of the oxide semiconductor layer comprises amorphous semiconductor.

11. The thin film transistor according to claim 1 , wherein at least one layer of the multilayer film of the oxide semiconductor layer comprises polycrystalline semiconductor.

12. The thin film transistor according to claim 1 , wherein the gate electrode is between the gate insulating film and a substrate.

13. The thin film transistor according to claim 1 , wherein the oxide semiconductor layer is between the gate insulating film and a substrate.

14. The thin film transistor of claim 1 , wherein the carrier travel layer comprises amorphous semiconductor.

15. The thin film transistor of claim 1 , wherein the carrier supply layer comprises amorphous semiconductor.

16. The thin film transistor of claim 1 , wherein the carrier travel layer comprises polycrystalline semiconductor.

17. The thin film transistor of claim 1 , wherein the carrier supply layer comprises polycrystalline semiconductor.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →