IP Library Granted Patent US 8,515,282
Granted Patent B2
US 8,515,282 · App. 12/967,461 · Granted Aug 20, 2013

Optical burst receiver with a configurable AC and DC coupling interface

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,515,282
App. No.
12/967,461
Granted
Aug 20, 2013
Kind
B2
Abstract

A method for enabling AC coupling or DC coupling when receiving burst data signals comprises generating a hold-over pattern, wherein the hold-over pattern is a AC balanced pattern when an AC coupling is required and a low-logic value signal when a DC coupling is required; inputting the generated hold-over pattern to an AC coupling circuit, when no burst data signal is received; inputting only a received burst data signal to the AC coupling circuit, during the reception of such signal; and upon receiving of the entire burst data signal, generating a reset signal causing to input the generated hold-over pattern to an AC coupling circuit.

Claims (37)

1. A method for enabling an alternating current (AC) coupling of burst data signals received at an optical line terminal (OLT), wherein the OLT comprises a medium access control (MAC) module, a burst optical receiver, an AC coupling circuit and an AC coupling control circuit, and is operable in a passive optical network (PON), the method comprising:

generating, utilizing the MAC module, an AC balanced hold-over pattern;

inputting the generated AC balanced hold-over pattern to the AC coupling circuit in the absence of a burst data signal being received by the AC coupling control circuit, wherein the AC coupling circuit and the AC coupling control circuit are connected between the MAC module and the burst optical receiver;

inputting a received burst data signal to the AC coupling circuit during the reception of the received burst data signal by the AC coupling control circuit; and

generating, utilizing the MAC module, a reset signal to control the AC coupling control circuit to input the generated AC balanced hold-over pattern to the AC coupling circuit, wherein the reset signal is generated following receipt of the received burst data signal.

2. The method of claim 1 , wherein a determination of whether the burst data signal has been received is based on an optical signal-detect signal generated by the burst optical receiver.

3. The method of claim 1 , wherein the reset signal is further generated when a ranging process of the OLT ends.

4. The method of claim 1 , wherein the AC balanced hold-over pattern is an alternating sequence of low-logic value and high-logic value bits, or a 50% duty-cycle clock signal.

5. The method of claim 1 , further comprising:

DC coupling burst data signals by setting the AC balanced hold-over pattern to a low-logic value signal.

6. The method of claim 5 , wherein the burst data signals are DC coupled when a DC level of the MAC module is greater than or equal to a DC level of the burst optical receiver.

7. The method of claim 1 , wherein the PON comprises at least one of:

a Gigabit PON and a 10XPON.

8. The method of claim 1 , wherein the PON comprises at least one of: a Gigabit PON and a XGPON.

9. A non-transitory computer readable medium having stored thereon instructions for causing one or more processing units to execute a process for enabling an alternating current (AC) coupling of burst data signals received at art optical line terminal (OLT), wherein the OLT comprises a medium access control (MAC) module, a burst optical receiver, an AC coupling circuit and an AC coupling control circuit, and is operable in a passive optical network (PON), the process comprising:

instructing the MAC module to generate an AC balanced hold-over pattern;

inputting, in the absence of a burst data signal being received by the AC coupling control circuit, the generated AC balanced hold-over pattern to the AC coupling circuit;

inputting, during reception of a received burst data signal by the AC coupling control circuit, the received burst data signal to the AC coupling circuit; and

instructing the MAC module to generate a reset signal to control the inputting of the generated AC balanced hold-over pattern to the AC coupling circuit, wherein the reset signal is generated following receipt of the received burst data signal.

10. An optical line terminal (OLT) operable in a passive optical network (PON) and configured to perform alternating current (AC) coupling of input burst data signals, the OLT comprising:

an optical transceiver configured to receive input burst data signals from a plurality of optical network units (ONUs) of the PON;

a medium access control (MAC) module configured to generate a hold-over pattern and a reset signal;

an AC coupling circuit, connected between the optical transceiver and the MAC module, configured to unbias direct current (DC) levels of the received input burst data signals; and

an AC coupling control circuit configured to feed to hold-over pattern or a received burst data signal to the AC coupling circuit based on an optical signal-detect signal and the reset signal.

11. The OLT of claim 10 , wherein the hold-over pattern is an AC balanced hold-over pattern.

12. The OLT of claim 11 , wherein the AC balanced hold-over pattern is an alternating sequence of low-logic value and high-logic value bits, or a 50% duty-cycle clock signal.

13. The OLT of claim 10 , wherein the AC coupling control circuit comprises;

a flip-flop configured to generate a selection signal based on the reset signal and the optical signal-detect signal;

a multiplexer configured to select between a first input including the hold-over pattern and a second input including the received burst data signal based on the selection signal generated by the flip-flop; and

a differential amplifier connected to an output of the multiplexer, the differential amplifier being configured to generate a difference signal based on a signal fed from the multiplexer.

14. The OLT of claim 13 , wherein the multiplexer is configured to output the received burst data signal during the reception of the received burst data signal and to output the hold-over pattern when the reset signal is asserted.

15. The OLT of claim 14 , wherein the reset signal is asserted when an entire burst data signal is received or a ranging process of the OLT has completed.

16. The OLT of claim 14 , wherein the MAC module is further configured to set the hold-over pattern to a low-logic value signal.

17. The OLT of claim 16 , wherein the hold-over pattern is set to a low-logic value signal when a DC level of the MAC module is greater than or equal to a DC level of the optical transceiver.

18. The OLT of claim 13 , wherein the AC coupling circuit further comprises first and second capacitors configured in parallel.

19. The OLT of claim 18 , wherein the difference signal comprises an output signal and an inverted signal that is the inverse of the output signal, wherein the first capacitor is configured to receive the output signal and the second capacitor is configured to receive the inverted signal.

20. The OLT of claim 10 , wherein the optical transceiver farther comprises a continuous optical transmitter.

Assignments (9)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2012
From: BROADCOM BROADBAND ACESS LTD.
To: BROADCOM INTERNATIONAL LIMITED
Reel/Frame 029256/0895 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 7, 2012
From: BROADCOM INTERNATIONAL LIMITED
To: BROADCOM CORPORATION
Reel/Frame 029256/0939 →
CHANGE OF NAME Recorded Nov 7, 2012
From: BROADLIGHT LTD.
To: BROADCOM BROADBAND ACCESS LTD.
Reel/Frame 029259/0975 →