Doherty amplifier
View Patent ↗A combination amplifier, in particular a Doherty amplifier allowing dynamic biasing, is provided, the combination amplifier comprising a first amplifier ( 3,3 a ,3 b ) having a first input terminal ( 11,11 a ,11 b ) and a first output terminal ( 25,25 a ,25 b ); a second amplifier ( 5,5 a ,5 b ) having a second input terminal ( 27,27 a ,27 b ) and a second output terminal ( 29,29 a ,29 b ); a first impedance inverter (Li, 43 b ) connected between the first input terminal and the second input terminal; and an envelope detector ( 33,33 a ,33 b ) comprising a detector output terminal and a detector input terminal which is connected to the first output terminal.
1. Combination amplifier, comprising:
a first amplifier having a first input terminal and a first output terminal;
a second amplifier having a second input terminal and a second output terminal;
a first impedance inverter connected between the first input terminal and the second input terminal; and
an envelope detector comprising a detector output terminal and a detector input terminal which is connected to the first output terminal, wherein the envelope detector comprises a directional coupler comprising the detector output terminal, the coupler comprising a coupling bond wire which is adapted for electromagnetic coupling to the second impedance inverter.
2. Combination amplifier according to claim 1 , wherein the envelope detector comprises at least one of a directional coupler; a peak voltage detector; a rectifier; a semiconductor diode; an amplification device; a magnetic field sensor; an electric field sensor; and a current sensor.
3. Combination amplifier according to claim 1 , further comprising
a second impedance inverter
which is connected between the second output terminal of the second amplifier and the first output terminal of the first amplifier.
4. Combination amplifier according to claim 1 , further comprising
a bias control path
which connects the detector output terminal of the envelope detector and the second input terminal of the second amplifier.
5. Combination amplifier according to claim 4 , further comprising
an envelope signal processor
which is arranged within the bias control path, wherein the envelope signal processor is adapted to process a detector output signal supplied by the detector output terminal and is adapted to supply the processed detector output signal to the second input terminal.
6. Combination amplifier according to claim 5 , wherein the envelope signal processor is adapted to process the detector output signal such that the processed detector output signal supplied to the second input terminal controls the second amplifier such that an amplifier output signal at the second output terminal depends linearly on an input signal applied to the combination amplifier.
7. Combination amplifier according to claim 1 , wherein the first amplifier and the second amplifier are integrated on a common semiconductor chip.
8. The combination amplifier of claim 1 , wherein the second impedance inverter comprises
a second bond wire
which is arranged for coupling to the coupling bond wire, in particular arranged parallel to the coupling bond wire.
9. The combination amplifier of claim 1 , further comprising
a mismatch detection circuit
to which another detector output terminal of the directional coupler is connected.
10. The combination amplifier of claim 9 , wherein the mismatch detection circuit is adapted to control an operation of the combination amplifier.