Bypass diode for a solar cell
View Patent ↗Bypass diodes for solar cells are described. In one embodiment, a bypass diode for a solar cell includes a substrate of the solar cell. A first conductive region is disposed above the substrate, the first conductive region of a first conductivity type. A second conductive region is disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type.
1. A bypass diode for a solar cell, the bypass diode comprising:
a substrate of the solar cell;
a first conductive region disposed above the substrate, the first conductive region of a first conductivity type;
and a second conductive region disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type; and further comprising:
an isolation trench disposed in the substrate and surrounding the portion of the substrate below the first conductive region, wherein the isolation trench is filled with a dielectric layer that is disposed on the first and second conductive regions.
2. The bypass diode of claim 1 , further comprising: a thin dielectric layer disposed on the substrate, wherein the first conductive region is disposed on the thin dielectric layer.
3. The bypass diode of claim 1 , wherein the second conductive region is narrower than the first conductive region, exposing a top surface of the first conductive region.
4. The bypass diode of claim 3 , wherein the substrate is doped with N-type dopant impurity atoms, the first conductivity type is P-type, the second conductivity type is N-type, and exposing the top surface of the first conductive region comprises exposing a P-type region.
5. The bypass diode of claim 3 , wherein the substrate is doped with P-type dopant impurity atoms, the first conductivity type is N-type, the second conductivity type is P-type, and exposing the top surface of the first conductive region comprises exposing an N-type region.
6. The bypass diode of claim 1 , wherein the second conductive region is disposed within, and surrounded by, an uppermost portion of the first conductive region, but is not disposed in a lowermost portion of the first conductive region.
7. The bypass diode of claim 6 , wherein the substrate is doped with N-type dopant impurity atoms, the first conductivity type is P-type, the second conductivity type is N-type, and the second conductive region is disposed within and surrounded by a P-type region.
8. The bypass diode of claim 6 , wherein the substrate is doped with P-type dopant impurity atoms, the first conductivity type is N-type, the second conductivity type is P-type, and the second conductive region is disposed within and surrounded by a N-type region.
9. The bypass diode of claim 1 , wherein the bottom surface of the isolation trench comprises a random or regularized texturing pattern.
10. A bypass diode for a solar cell, the bypass diode comprising:
a substrate of the solar cell;
a first conductive region disposed above the substrate, the first conductive region of a first conductivity type;
and a second conductive region disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type and further comprising:
a thin dielectric layer disposed on the substrate, wherein the first conductive region is disposed on the thin dielectric layer;
wherein the second conductive region is narrower than the first conductive region, exposing a top surface of the first conductive region.
11. The bypass diode of claim 10 , wherein the substrate is doped with N-type dopant impurity atoms, the first conductivity type is P-type, the second conductivity type is N-type, and exposing the top surface of the first conductive region comprises exposing a P-type region.
12. The bypass diode of claim 10 , wherein the substrate is doped with P-type dopant impurity atoms, the first conductivity type is N-type, the second conductivity type is P-type, and exposing the top surface of the first conductive region comprises exposing an N-type region.
13. The bypass diode of claim 10 , further comprising: an isolation trench disposed in the substrate and surrounding the portion of the substrate below the first conductive region, wherein the isolation trench is filled with a dielectric layer that is disposed on the first and second conductive regions.
14. The bypass diode of claim 13 , wherein the bottom surface of the isolation trench comprises a random or regularized texturing pattern.
15. A bypass diode for a solar cell, the bypass diode comprising:
a substrate of the solar cell;
a first conductive region disposed above the substrate, the first conductive region of a first conductivity type;
and a second conductive region disposed on the first conductive region, the second conductive region of a second conductivity type opposite the first conductivity type; and further comprising:
wherein the second conductive region is disposed within, and surrounded by, an uppermost portion of the first conductive region, but is not disposed in a lowermost portion of the first conductive region.
16. The bypass diode of claim 15 , further comprising: a thin dielectric layer disposed on the substrate, wherein the first conductive region is disposed on the thin dielectric layer.
17. The bypass diode of claim 15 , wherein the substrate is doped with N-type dopant impurity atoms, the first conductivity type is P-type, the second conductivity type is N-type, and the second conductive region is disposed within and surrounded by a P-type region.
18. The bypass diode of claim 15 , wherein the substrate is doped with P-type dopant impurity atoms, the first conductivity type is N-type, the second conductivity type is P-type, and the second conductive region is disposed within and surrounded by a N-type region.