IP Library Granted Patent US 8,114,695
Granted Patent B2
US 8,114,695 · App. 12/970,272 · Granted Feb 14, 2012

Solid-state image pickup element, solid-state image pickup device and production method therefor

Assignee: Unisantis Electronics Singapore PTE Ltd.
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Quick Facts
Patent No.
US 8,114,695
App. No.
12/970,272
Granted
Feb 14, 2012
Kind
B2
Abstract

A method of producing a solid-state image pickup element includes forming a hole portion, forming a first-conductive type high-concentration impurity region in a bottom wall of the hole portion, and forming a first-conductive type high-concentration impurity-doped element isolation region in a part of a sidewall of the hole portion and connected to the first-conductive type high-concentration impurity region. The method also includes forming a second-conductive type photoelectric conversion region beneath the first-conductive type high-concentration impurity region and adapted to undergo a change in charge amount upon receiving light, and forming a transfer electrode formed on the sidewall of the hole portion through a gate dielectric film. The method further includes forming a second-conductive type CCD channel region in a top surface of the first-conductive type planar semiconductor layer, and forming a read channel sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.

Claims (37)

1. A method of producing a solid-state image pickup element, comprising the steps of:

forming a hole portion defining a hole therein, in a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer;

forming a first-conductive type high-concentration impurity region in a bottom wall of the hole portion of the first-conductive type planar semiconductor layer;

forming a first-conductive type high-concentration impurity-doped element isolation region in a part of a sidewall of the hole portion of the first-conductive type planar semiconductor layer;

forming a second-conductive type photoelectric conversion region adapted to undergo a change in charge amount upon receiving light, in a portion of the first-conductive type planar semiconductor layer located beneath the first-conductive type high-concentration impurity region and in a part of a lower region of the remaining part of the sidewall of the hole portion of the first-conductive type planar semiconductor layer;

forming a transfer electrode on the entire sidewall of the hole portion of the first-conductive type planar semiconductor layer through a gate dielectric film wherein forming the transfer electrode further comprises forming the transfer electrode on the sidewall where the first-conductive type high-concentration impurity-doped element isolation region is formed;

forming a second-conductive type CCD channel region in a top surface of the first-conductive type planar semiconductor layer and in a part of an upper region of the remaining part of the sidewall of the hole portion of the first-conductive type planar semiconductor layer; and

forming a read channel in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region.

2. The method as defined in claim 1 , wherein the step of forming a hole portion includes forming a mask on the first-conductive type planar semiconductor layer formed on the second-conductive type planar semiconductor layer, and etching the first-conductive type planar semiconductor layer to form the hole portion therein.

3. The method as defined in claim 2 , wherein the step of forming a second-conductive type photoelectric conversion region further includes:

forming a masking material on the sidewall of the hole portion of the first-conductive type planar semiconductor layer; and

forming the second-conductive type photoelectric conversion region by an ion-implantation process.

4. The method as defined in claim 3 , wherein the step of forming a first-conductive type high-concentration impurity region is performed after the step of forming the second-conductive type photoelectric conversion region by an ion-implantation process.

5. A method of producing a solid-state image pickup element, comprising the steps of:

forming a hole portion defining a hole therein, in a first-conductive type planar semiconductor layer formed on a second-conductive type planar semiconductor layer;

forming a first-conductive type high-concentration impurity region in a bottom wall of the hole portion of the first-conductive type planar semiconductor layer;

forming a first-conductive type high-concentration impurity-doped element isolation region in a part of a sidewall of the hole portion of the first-conductive type planar semiconductor layer;

forming a second-conductive type photoelectric conversion region adapted to undergo a change in charge amount upon receiving light, in a portion of the first-conductive type planar semiconductor layer located beneath the first-conductive type high-concentration impurity region and in a part of a lower region of the remaining part of the sidewall of the hole portion of the first-conductive type planar semiconductor layer;

forming a transfer electrode on the sidewall of the hole portion of the first-conductive type planar semiconductor layer through a gate dielectric film;

forming a second-conductive type CCD channel region in a top surface of the first-conductive type planar semiconductor layer and in a part of an upper region of the remaining part of the sidewall of the hole portion of the first-conductive type planar semiconductor layer; and

forming a read channel in a region of the first-conductive type planar semiconductor layer sandwiched between the second-conductive type photoelectric conversion region and the second-conductive type CCD channel region;

wherein the step of forming a hole portion includes forming a mask on the first-conductive type planar semiconductor layer formed on the second-conductive type planar semiconductor layer, and etching the first-conductive type planar semiconductor layer to form the hole portion therein;

wherein the step of forming a second-conductive type photoelectric conversion region includes the sub-steps of: forming a masking material on the sidewall of the hole portion of the first-conductive type planar semiconductor layer; and forming the second-conductive type photoelectric conversion region by an ion-implantation process;

wherein the step of forming a first-conductive type high-concentration impurity region is performed after the sub-step of forming the second-conductive type photoelectric conversion region by an ion-implantation process; and

the method further comprising the step of, after the sub-step of forming the second-conductive type photoelectric conversion region by an ion-implantation process, removing a part of the masking material formed on the sidewall of the hole portion of the first-conductive type planar semiconductor layer,

wherein each of the step of forming a first-conductive type high-concentration impurity region and the step of forming a first-conductive type high-concentration impurity-doped element isolation region is performed by an ion-implantation process after the step of removing a part of the masking material.

6. The method as defined in claim 2 , wherein the step of forming a second-conductive type CCD channel region includes:

forming a masking material on the hole portion of the first-conductive type planar semiconductor layer; and

forming the second-conductive type CCD channel region by an ion-implantation process.

7. The method as defined in claim 6 , wherein the step of forming a first-conductive type high-concentration impurity-doped element isolation region includes:

forming a masking material in such a manner as to allow the first-conductive type high-concentration impurity-doped element isolation region to be formed in connected relation to the first-conductive type high-concentration impurity region by an ion-implantation process; and

forming the first-conductive type high-concentration impurity-doped element isolation region by the ion-implantation process.

8. The method as defined in claim 2 , wherein the step of forming a transfer electrode includes:

forming the gate dielectric film on a surface of the first-conductive type planar semiconductor layer;

depositing a gate electrode material on the gate dielectric film;

flattening the gate electrode material; and

etching the flattened gate electrode material to form the transfer electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 26, 2011
From: UNISANTIS ELECTRONICS JAPAN LTD.
To: UNISANTIS ELECTRONICS SINGAPORE PTE LTD.
Reel/Frame 026970/0670 →
Priority Claims (1)
WO PCT/JP2008/069321 · Oct 24, 2008 · international
Continuity (3)
Division 12603001 · Oct 21, 2009
Provisional Application 61207713 · Feb 13, 2009
Related Publication 20110086460A1 · Apr 14, 2011