IP Library Granted Patent US 8,531,261
Granted Patent B2
US 8,531,261 · App. 12/973,363 · Granted Sep 10, 2013

Transformer and method for using same

Inventors: Denis Pache (Grenoble, FR); Nejdat Demirel (Pessac, FR)
Assignee: STMicroelectronics, S.A.
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Quick Facts
Patent No.
US 8,531,261
App. No.
12/973,363
Granted
Sep 10, 2013
Kind
B2
Abstract

Method for improving the symmetry of the differential output signals of an integrated transformer of the symmetric-asymmetric type comprising an inductive primary circuit and an inductive secondary circuit, characterized in that the capacitive coupling between the primary and secondary circuits is reduced.

Claims (33)

1. An integrated circuit comprising:

a first inductor circuit, the first inductor circuit comprising a first coil and a second coil;

a second inductor circuit; and

a shield element interposed the first and second inductor circuit, wherein the first and second inductor circuits and the shield element are in a common metal layer of said integrated circuit.

2. The integrated circuit of claim 1 wherein said shield element is a grounded conductor.

3. The integrated circuit of claim 1 , wherein the first inductor circuit surrounds the second inductor circuit.

4. The integrated circuit of claim 1 , wherein the shield element comprises at least two physically separated sections.

5. The integrated circuit of claim 1 , wherein the shield element extends through at least two metal layers.

6. The integrated circuit of claim 1 , wherein the shield element extends along at least one of the first inductor circuit and the second inductor circuit.

7. An integrated circuit including a symmetric-asymmetric transformer comprising:

an inductive primary circuit;

an inductive secondary circuit; and

reducing means for reducing the capacitive coupling between the primary circuit and the secondary circuit, wherein the reducing means comprises cold node coupling capacitors that are created between the inductive primary and inductive secondary circuits.

8. The integrated circuit according to claim 7 , in which the reducing means comprises an electrically conducting shield connected to earth and extending at least between the inductive primary circuit and the inductive secondary circuit.

9. The integrated circuit according to claim 8 , in which the shield comprises at least one metallic layer.

10. The integrated circuit according to claim 8 , in which the shield is physically separated into sections so as to form distinct shielding zones.

11. The integrated circuit according to claim 8 , in which the shield furthermore extends along at least one of the inductive primary and inductive secondary circuits.

12. The integrated circuit according to claim 8 , wherein the shield extends over a height corresponding to a plurality of metallization levels of the integrated circuit.

13. The integrated circuit according to claim 7 , wherein the inductive primary circuit and the inductive secondary circuit are coplanar.

14. The integrated circuit according to claim 7 , wherein the inductive primary circuit and the inductive secondary circuit are stacked.

15. The integrated circuit according to claim 7 , further comprising power amplification means connected to said symmetric-asymmetric transformer.

16. The integrated circuit according to claim 15 , in which the power amplification means is connected between two symmetric-asymmetric transformers.

17. The integrated circuit according to claim 7 , further comprising auxiliary capacitors connected in parallel with each respective symmetric-asymmetric transformer.

18. A method comprising:

inducing in a first secondary winding a current as a result of inductive coupling of said first secondary winding with a first primary winding;

wherein a shield element interposed between said first primary winding and said first secondary winding reduces capacitive coupling between said first primary winding and said first secondary winding relative to an identical structure without the shield element;

inducing in a second secondary winding a second current as a result of inductive coupling of said second secondary winding with a second primary winding;

wherein a second shield element interposed between said second primary winding and said secondary winding reduces capacitive coupling between said second primary winding and said second secondary winding relative to an identical structure without the second shield element.

19. The method of claim 18 further comprising:

receiving a signal from said first secondary winding; and

amplifying said signal.

20. The method of claim 19 further comprising:

receiving at said second primary winding said amplified signal.

Assignments (2)
CHANGE OF NAME Recorded Dec 8, 2023
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 065835/0159 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 3, 2011
From: PACHE, DENIS; DEMIREL, NEJDAT
To: STMICROELECTRONICS, S.A.
Reel/Frame 025895/0356 →
Priority Claims (1)
FR 09 59354 · Dec 22, 2009 · national
Continuity (1)
Related Publication 20110148542A1 · Jun 23, 2011