IP Library Granted Patent US 8,983,008
Granted Patent B2
US 8,983,008 · App. 12/975,343 · Granted Mar 17, 2015

Methods and apparatus for tail termination of turbo decoding

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Quick Facts
Patent No.
US 8,983,008
App. No.
12/975,343
Granted
Mar 17, 2015
Kind
B2
Abstract

Methods and apparatus for trellis termination of a turbo decoder are disclosed which simplifies the hardware implementation. As a given example, backward state metrics, which is required to be calculated with forward state metric as part of a constitute decoding, are initialized with pre-calculated values based on input bits.

Claims (25)

1. A receiver device comprising a plurality of maximum a posteriori decoders configured to iteratively compute one or more received input signal sequences, the decoders configured to:

calculate backward state initial values from an input signal,

store the backward state initial values as a pre-computed backward state metric into a memory;

for each iteration of a plurality of iterations, the decoders are further configured to:

compute a forward state metric;

compute a backward state metric,

wherein for each of the plurality of iterations for calculating the backward state metric, the decoders are configured to retrieve from the memory, the initial state values of the backward state metric, and wherein the initial values of the backward state metric are pre-computed from the received input signal independent of the plurality of decoding iterations.

2. The receiver device according to claim 1 , comprising iterative decoding for turbo codes.

3. The receiver device according to claim 1 , comprising radix-4 decoder for turbo codes defined by LTE standard, wherein the said decoder produces two extrinsic information bits at each state transition.

4. The receiver of claim 1 ,

wherein each said decoding iteration is substantially identical.

5. The receiver of claim 1 , wherein the plurality of maximum a posteriori decoders are configured as a turbo decoder.

6. The receiver of claim 1 , wherein the plurality of maximum a posteriori decoders are configured as a radix-4 decoder.

7. The receiver of claim 1 , wherein at least one of said plurality of iterations further comprises extrinsic information.

8. A method for tail termination in a receiver comprising a plurality of maximum a posteriori decoders and configured to iteratively compute a received input signal sequences, the method comprising:

calculating, by the decoders, backward state initial values from an input signal,

storing, by the decoders, the backward state initial values as a pre-computed backward state metric into a memory;

for each of a plurality of decoding iterations, the method further comprising

calculating, by the decoders, a forward state metric;

calculating, by the decoders, a backward state metric,

wherein for each of the plurality of decoding iterations for calculating the backward state metric, fetching the pre-computed backward state metric from the memory as an initial backward state metric, wherein the initial backward state metric is pre-computed independent of said plurality of decoding iterations.

9. The method of claim 8 , wherein each of the plurality of decoding iterations is substantially identical.

10. The method of claim 8 , wherein the plurality of maximum posteriori decoders are configured as a turbo decoder.

11. The method of claim 8 , wherein the plurality of maximum posteriori decoders are configured as a radix-4 decoder.

12. The method of claim 8 , wherein at least one of said plurality of decoding iterations further comprises extrinsic information.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 28, 2014
From: MINDSPEED TECHNOLOGIES, INC.; MINDSPEED TECHNOLOGIES U.K., LIMITED; MINDSPEED TELECOMMUNICATIONS TECHNOLOGIES DEVELOPMENT (SHENSHEN) CO. LTD.; PICOCHIP (BEIJING) TECHNOLOGY COMPANY LIMITED
To: INTEL CORPORATION
Reel/Frame 032372/0154 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 25, 2013
From: LI, YUAN; ZHANG, TAO; ZHU, JIANBIN
To: MINDSPEED
Reel/Frame 031281/0777 →