Semiconductor device
View Patent ↗A semiconductor device includes at least three or more wiring layers stacked in an interlayer insulating film on a semiconductor substrate, a seal ring provided at the outer periphery of a chip region of the semiconductor substrate and a chip strength reinforcement provided in part of the chip region near the seal ring. The chip strength reinforcement is made of a plurality of dummy wiring structures and each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including one or none of the bottommost wiring layer and the topmost wiring layer using a via portion.
1. A semiconductor device comprising:
a plurality of interlayer insulating films stacked on a semiconductor substrate;
at least three or more wiring layers formed in the plurality of interlayer insulating films; and
a chip strength reinforcement formed in the plurality of interlayer insulating films, wherein
the chip strength reinforcement is made of a plurality of dummy wiring structures,
each of the plurality of dummy wiring structures is formed to extend across and within two or more of the wiring layers including only one or none of the bottommost wiring layer and the topmost wiring layer using a via portion, and
the plurality of interlayer insulating films include a first interlayer insulating film which includes a first silicon carbon nitride film, and a first carbon-containing silicon oxide film formed above the first silicon carbon nitride film.
2. The semiconductor device of claim 1 , wherein
at least one of the plurality of dummy wiring structures has a first wiring layer formed in the first interlayer insulating film, and
the first carbon-containing silicon oxide film is formed to be in contact with a side surface of the first wiring layer.
3. The semiconductor device of claim 1 , wherein
the plurality of interlayer insulating films include a second interlayer insulating film which includes a second silicon carbon nitride film formed on the first interlayer insulating film, and a second carbon-containing silicon oxide film formed above the second silicon carbon nitride film.
4. The semiconductor device of claim 3 , wherein
at least one of the plurality of dummy wiring structures includes a first wiring layer formed in the first interlayer insulating film, and
the second silicon carbon nitride film is formed to be in contact with an upper surface of the second wiring layer.
5. The semiconductor device of claim 3 , wherein
at least one of the plurality of dummy wiring structures includes a first wiring layer formed in the first interlayer insulating film, a second wiring layer formed in the second interlayer insulating film, and a first via portion which is formed below the second wiring layer in the second interlayer insulating film, and connects the first wiring layer and the second wiring layer.
6. The semiconductor device of claim 5 , wherein
the first via portion is formed to penetrate the second silicon carbon nitride film.
7. The semiconductor device of claim 3 , wherein
the second silicon carbon nitride film is formed to be in contact with the first carbon-containing silicon oxide film.
8. The semiconductor device of claim 1 , wherein
the first interlayer insulating film includes another insulating film formed between the first silicon carbon nitride film and the first carbon-containing silicon oxide film.
9. The semiconductor device of claim 1 , wherein
at least two of the plurality of dummy wiring structures have at least a portion formed in the same wiring layer.
10. The semiconductor device of claim 1 , wherein
at least one of a pair of dummy wiring structures among the plurality of dummy wiring structures has a portion formed in one of the wiring layers in which the other of the pair is not formed.
11. The semiconductor device of claim 1 , wherein
at least two of the plurality of dummy wiring structures have a portion formed in the bottommost wiring layer.
12. The semiconductor device of claim 1 , wherein
at least one of the plurality of dummy wiring structures has a portion extending in a certain direction in at least one of the wiring layers and another portion extending in a different direction in the same wiring layer and being connected to the certain portion.
13. The semiconductor device of claim 1 , wherein
each of the plurality of dummy wiring structures contains copper.
14. The semiconductor device of claim 1 , wherein
the plurality of dummy wiring structures are provided at corners of a chip region of the semiconductor substrate.
15. The semiconductor device of claim 1 , wherein
at least one of the plurality of dummy wiring structures does not include the topmost wiring layer, and is formed to extend across and within two or more wiring layers including the bottommost wiring layer using a via portion.
16. The semiconductor device of claim 1 , wherein
at least one of the plurality of dummy wiring structures does not include the bottommost wiring layer, and is formed to extend across and within two or more wiring layers including the topmost wiring layer using a via portion.
17. The semiconductor device of claim 1 , wherein
at least one of the plurality of dummy wiring structures is formed to extend across and within two or more wiring layers including none of the topmost wiring layer and the bottommost wiring layer using a via portion.
18. The semiconductor device of claim 2 , wherein
the first wiring layer includes a layer containing copper.
19. The semiconductor device of claim 2 , wherein
the first wiring layer includes a layer containing tantalum, and a layer containing copper.
20. The semiconductor device of claim 2 , wherein
the first wiring layer includes a layer containing tantalum nitride, and a layer containing copper.
21. The semiconductor device of claim 1 , further comprising:
a seal ring provided at a periphery of a chip region of the semiconductor substrate, wherein
the chip strength reinforcement is arranged in the chip region near the seal ring.
22. The semiconductor device of claim 1 , wherein
the first silicon carbon nitride film is made of SiCN, and
the first carbon-containing silicon oxide film is made of SiOC.
23. The semiconductor device of claim 1 , wherein
the plurality of interlayer insulating films includes a second interlayer insulating film which includes a second carbon nitride film formed on the first interlayer insulating film, and a second carbon-containing silicon oxide film formed above the second silicon carbon nitride film,
at least one of the plurality of dummy wiring structures includes a first wiring layer formed in the first interlayer insulating film,
the first carbon-containing silicon oxide film is formed to be in contact with a side surface of the first wiring layer, and
the second silicon carbon nitride film is formed to be in contact with an upper surface of the first wiring layer.
24. The semiconductor device of claim 23 , wherein
the at least one of the plurality of dummy wiring structures includes a second wiring layer formed in the second interlayer insulating film, and a first via portion which is formed below the second wiring layer in the second interlayer insulating film, and connects the first wiring layer and the second wiring layer,
the first via portion is formed to penetrate the second silicon carbon nitride film,
the second silicon carbon nitride film is formed to be in contact with the first carbon-containing silicon oxide film, and
the first interlayer insulating film includes another insulating film formed between the first silicon carbon nitride film and the first carbon-containing silicon oxide film.
25. The semiconductor device of claim 24 , wherein
the first silicon carbon nitride film and the second silicon carbon nitride film are made of SiCN, and
the first carbon-containing silicon oxide film and the second carbon-containing silicon oxide film are made of SiOC.
26. The semiconductor device of claim 25 , wherein
each of the first wiring layer and the second wiring layer includes a layer containing tantalum, and a layer containing copper.