IP Library Granted Patent US 8,441,920
Granted Patent B2
US 8,441,920 · App. 12/986,888 · Granted May 14, 2013

Redundancy in voice and data communications systems

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Quick Facts
Patent No.
US 8,441,920
App. No.
12/986,888
Granted
May 14, 2013
Kind
B2
Abstract

A method includes receiving information at an interface circuit and providing the information from the interface circuit to a processing circuit through a direct communications path between the interface circuit and a processing circuit, which processes the information received from the interface circuit. The method further includes providing the information from the interface circuit to the processing circuit via a crosspoint switch in response to a failure of the direct communications path, wherein the direct communication does not pass through the crosspoint switch.

Claims (40)

1. A method comprising:

receiving information at an interface circuit;

providing information from the interface circuit to a processing circuit through a direct communications path between the interface circuit and the processing circuit;

processing the information at the processing circuit; and

providing information from the interface circuit to the processing circuit via a crosspoint switch in response to a failure of the direct communications path;

wherein the direct communications path does not pass through the crosspoint switch and wherein the crosspoint itch is directly interposed between the processing circuit and the interface circuit.

2. The method of claim 1 , wherein the interface circuit includes a line card.

3. The method of claim 1 , wherein the processing circuit includes an accelerator card.

4. The method of claim 1 , wherein the information includes Time Division Multiplexed (TDM) data.

5. The method of claim 1 , wherein the information includes Ethernet data.

6. The method of claim 1 , further comprising controlling the crosspoint switch at a switch interface circuit in communication with the crosspoint switch.

7. The method of claim 6 , wherein the switch interface circuit includes a switch processing input/output card.

8. The method of claim 6 , wherein the switch interface circuit communicates with the crosspoint switch through a System Control Bus (SCB) bus.

9. A method comprising:

receiving first information at a first interface circuit and second information at a second interface circuit;

sending the first information through a first direct communications path between the first interface circuit and a first processing circuit;

sending the second information through a second direct communications path between the second interface circuit and a second processing circuit;

processing the first information at the first processing circuit;

processing the second information at the second processing circuit; and

providing the first information from the first interface circuit to the first processing circuit via a crosspoint switch in response to a failure of the first direct communications path between the first interface circuit and the first processing circuit;

providing the second information from the second interface circuit to the second processing circuit via the crosspoint switch in response to a failure of the second direct communications path between the second interface circuit and the second processing circuit;

wherein the first direct communication between the first interface circuit and the first processing circuit does not pass through the crosspoint switch, and wherein the second direct communication between the second interface circuit and the second processing circuit does not pass through the crosspoint switch.

10. The method of claim 9 , wherein the first interface circuit and second interface circuit each includes a line card, and wherein the first processing circuit and second processing circuit each includes an accelerator card.

11. The method of claim 9 ,

wherein the first interface circuit includes at least one packet traffic line card carrying primarily packet traffic and the second interface circuit includes at least one voice traffic line card carrying primarily voice traffic; and

wherein the first processing circuit includes at least one packet processing accelerator card and the second processing circuit includes at least one voice processing accelerator card.

12. The method of claim 11 , wherein packet traffic line cards are in direct communication with packet processing accelerator cards, and voice traffic line cards are in direct communication with voice processing accelerator cards.

13. The method of claim 12 , wherein the crosspoint switch is programmable to provide:

a redundant communication path between a particular one of the at least one packet traffic line card and a particular one of the at least one packet processing accelerator card; and

a redundant communication path between a particular one of the at least one voice traffic line card and a particular one of the at least one voice processing accelerator card.

14. Logic encoded in non-transitory tangible medium that includes code for execution that, when executed by a processor, performs operations comprising:

causing information to be sent through a direct communications path from an interface circuit to a processing circuit to be processed at the processing circuit; and

causing the information to be provided from the interface circuit to the processing circuit via a crosspoint switch upon failure of the direct communications path;

wherein the direct communications path does not pass through the crosspoint switch and wherein the crosspoint switch is directly interposed between the processing circuit and the interface circuit.

15. The logic of claim 14 , wherein the interface circuit includes a line card.

16. The logic of claim 14 , wherein the processing circuit includes an accelerator card.

17. The logic of claim 14 , wherein the information includes Time Division Multiplexed (TDM) data.

18. The logic of claim 14 , wherein the information includes Ethernet data.

19. The logic of claim 14 , wherein the operations further includes controlling the crosspoint switch at a switch interface circuit in communication with the crosspoint switch.

20. The logic of claim 19 , wherein the switch interface circuit includes a switch processing input/output card.

Assignments (3)
CHANGE OF NAME Recorded Jan 29, 2015
From: STARENT NETWORKS, CORP.
To: STARENT NETWORKS LLC
Reel/Frame 034859/0215 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2014
From: BRADBURY, FRANK K.; KHAN, PARVEZ; DUNSTAN, STEVEN R.
To: STARENT NETWORKS CORPORATION
Reel/Frame 033624/0057 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2014
From: STARENT NETWORKS LLC
To: CISCO TECHNOLOGY, INC.
Reel/Frame 033624/0135 →