IP Library Granted Patent US 7,994,951
Granted Patent B2
US 7,994,951 · App. 12/987,661 · Granted Aug 9, 2011

Digital signal coding method and apparatus, digital signal decoding apparatus, digital signal arithmetic coding method and digital signal arithmetic decoding method

Assignee: Mitsubishi Denki Kabushiki Kaisha
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Quick Facts
Patent No.
US 7,994,951
App. No.
12/987,661
Granted
Aug 9, 2011
Kind
B2
Abstract

In a bit stream syntax containing compressed video slice data for compressed video data of a slice structure, a slice header for compressed video slice data has attached thereto a slice start code, a register reset flag indicating whether a register value, which designates a status of a codeword occurring in an arithmetic coding process, should be reset in the next transmission unit, an initial register value which indicates a register value to be used to start arithmetic coding/decoding to build/decompose the next transmission unit, only when the register reset flag indicates that the register should not be reset.

Claims (7)

1. A digital signal coding apparatus for making a compression coding of a digital signal, comprising:

a coding unit for arithmetic coding said digital signal by determining a context model to be used for each type of coding data among a plurality of context models;

wherein said coding unit, when said digital signal is divided for each predetermined unit to be coded, multiplexes into a bit stream information representing an initial state of probability of occurrence of the context of model corresponding to the type of said coding data and information of initializing a register value which shows an arithmetic coding process with a bit stream as part of the coded data of said predetermined unit.

2. A digital signal coding method for making a compression coding of a digital signal, comprising:

arithmetic coding said digital signal by determining a context model to be used for each type of coding data among a plurality of context models;

dividing said digital signal for each predetermined unit to be coded, and

multiplexing into a bit stream information representing an initial state of probability of occurrence of the context of model corresponding to the type of said coding data and information of initializing a register value which shows an arithmetic coding process with a bit stream as part of the coded data of said predetermined unit.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 28, 2020
From: MITSUBISHI ELECTRIC CORPORATION
To: XYLENE HOLDING S.A.
Reel/Frame 053905/0001 →
Priority Claims (1)
JP 2002-124114 · Apr 25, 2002 · national
Continuity (8)
Division 12862183 · Aug 24, 2010
Division 12367266 · Feb 6, 2009
Division 12032449 · Feb 15, 2008
Division 11781682 · Jul 23, 2007
Division 11797462 · May 3, 2007
Division 11325439 · Jan 5, 2006
Division 10480046
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