IP Library Patent Application 12987695
Patent Application
App. No. 12/987,695

METHOD OF FABRICATING A SEMICONDUCTOR DEVICE

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Quick Facts
Patent No.
US None
App. No.
12/987,695
Abstract

A semiconductor device includes: a transistor including source and drain diffusion-layers, a gate insulating film and a gate electrode; first and second plugs formed in a first interlayer-insulating film and connected to the source and drain diffusion-layers, respectively; a third plug extending through a second interlayer-insulating film and connected to the first plug; a first interconnection-wire formed on the second interlayer-insulating film and connected to the third plug; a second interconnection-wire formed on a third interlayer-insulating film and intersecting the first interconnection-wire; a fourth interlayer-insulating film; a hole extending through the fourth, third and second interlayer-insulating films, the hole being formed such that a side surface of the second interconnection-wire is exposed; and a fourth plug filling the hole via an intervening dielectric film and connected to the second plug, wherein a capacitor is formed using the fourth plug, the second interconnection-wire and the dielectric film sandwiched therebetween.

Claims (11)

1 . A method of fabricating a semiconductor device, comprising:

forming a first conductive plug connected to one of a source region and a drain region of a transistor, and a second conductive plug connected to the other of the regions, in a first interlayer insulating film covering the transistor;

forming a second interlayer insulating film covering the first and second conductive plugs;

forming a first hole extending through the second interlayer insulating film and then forming a third conductive plug filling the first hole, the third conductive plug being connected to the first conductive plug;

forming a first interconnection wire connected to the third conductive plug, the first interconnection wire being extending in a first direction;

forming a third interlayer insulating film covering the first interconnection wire;

forming a second interconnection wire extending in a second direction intersecting the first direction;

forming a fourth interlayer insulating film covering the second interconnection wire;

forming a second hole extending through the fourth, third and second interlayer insulating films to reach the second conductive plug, such that a side surface of the second interconnection wire is exposed;

forming a dielectric film on an inner wall of the second hole; and

forming a conductor in the second hole, connected to the second conductive plug, whereby a capacitor is formed using the conductor, the second interconnection wire and the dielectric film sandwiched therebetween.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2011
From: UCHIYAMA, HIROYUKI
To: ELPIDA MEMORY, INC.
Reel/Frame 025615/0536 →