IP Library Granted Patent US 8,761,219
Granted Patent B2
US 8,761,219 · App. 13/002,352 · Granted Jun 24, 2014

Optoelectronic semiconductor chip with gas-filled mirror

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Quick Facts
Patent No.
US 8,761,219
App. No.
13/002,352
Granted
Jun 24, 2014
Kind
B2
Abstract

An optoelectronic semiconductor chip includes a semiconductor body containing an active region, a mirror layer, and contact points arranged between the semiconductor body and the mirror layer and providing a spacing D between the semiconductor body and the mirror layer, whereby at least one cavity is formed between the mirror layer and the semiconductor body and the at least one cavity contains a gas.

Claims (37)

1. An optoelectronic semiconductor chip comprising:

a semiconductor body containing an active region,

a mirror layer, and

contact points arranged between the semiconductor body and the mirror layer and providing a spacing D between the semiconductor body and the mirror layer, whereby at least one cavity is formed between the mirror layer and the semiconductor body and the at least one cavity contains a gas,

wherein 1) the semiconductor body is free of a material of the mirror layer and the mirror layer projects beyond all of the contact points in a lateral direction, and 2) the lateral direction runs parallel to an area of a main extension of a topside of the semiconductor body.

2. The chip according to claim 1 , in which at least one contact point forms a closed track.

3. The chip according to claim 1 , in which, when the chip is in operation, an electric current is impressed at least via one of the contact points into the active region.

4. The chip according to claim 1 , in which the at least one cavity is sealed with a passivation material.

5. The chip according to claim 1 , in which the gas is enclosed in at least one of the cavities at a pressure lower than standard pressure.

6. The chip according to claim 1 , in which the contact points are in direct contact with the semiconductor body.

7. The chip according to claim 1 , in which the spacing D between the mirror layer and the semiconductor body is at least 10 nm and at most 10 μm.

8. The chip according to claim 1 , in which the contact points and the mirror layer have at least one metal in common.

9. The chip according to claim 1 , in which the contact points and the mirror layer consist of the same material.

10. The chip according to claim 1 , in which the contact points contain at least one solder material selected from the group consisting of Sn, In, Ga and Bi.

11. A method of producing an optoelectronic semiconductor chip comprising:

providing a semiconductor body with at least one active region,

providing a carrier with a mirror layer,

applying contact points to a top portion of the mirror layer and/or a bottom portion of the semiconductor body, and

connecting the semiconductor body and the mirror layer by way of the contact points using thermocompression, wherein the contact points provide a spacing D between semiconductor body and mirror layer, whereby at least one cavity is formed between mirror layer and semiconductor body, which cavity contains a gas,

wherein 1) the semiconductor body is free of a material of the mirror layer and the mirror layer projects beyond all of the contact points in a lateral direction, and 2) the lateral direction runs parallel to an area of a main extension of a topside of the semiconductor body.

12. The method according to claim 11 , wherein the contact points consist of the same material as the mirror layer.

13. The method according to claim 11 , wherein the contact points are applied using a printing method.

14. The method according to claim 11 , wherein the contact points are applied by vapor deposition.

15. The method according to claim 11 , wherein the contact points are applied as particles.

16. The method according to claim 11 , wherein the contact points are applied as beads.

17. The method according to claim 12 , wherein the contact points are applied using a printing method.

18. The method according to claim 12 , wherein the contact points are applied by vapor deposition.

19. The method according to claim 12 , wherein the contact points are applied as particles.

20. The method according to claim 12 , wherein the contact points are applied as beads.

21. An optoelectronic semiconductor chip comprising:

a carrier,

a semiconductor body containing an active region,

a mirror layer applied on the carrier, and

contact points arranged between the semiconductor body and the mirror layer and providing a spacing D between semiconductor body and mirror layer, whereby at least one cavity is formed between the mirror layer and the semiconductor body and the at least one cavity contains a gas,

wherein 1) the semiconductor body is free of a material of the mirror layer and the mirror layer projects beyond all of the contact points in a lateral direction, and 2) the lateral direction runs parallel to an area of a main extension of a topside of the semiconductor body.

22. The chip according to claim 21 , wherein the mirror layer comprises a Bragg mirror.

23. The chip according to claim 21 , wherein the mirror layer comprises a combination of a Bragg mirror and a metallic mirror.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 3, 2020
From: OSRAM OPTO SEMICONDUCTORS GMBH
To: OSRAM OLED GMBH
Reel/Frame 051467/0906 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 23, 2011
From: GROLIER, VINCENT; PLOSSL, ANDREAS
To: OSRAM OPTO SEMICONDUCTORS GMBH
Reel/Frame 025849/0039 →