IP Library Patent Application 13011221
Patent Application
App. No. 13/011,221

SYSTEM AND METHOD FOR DYNAMIC VIDEO MODE SWITCHING

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Quick Facts
Patent No.
US None
App. No.
13/011,221
Abstract

The video output system in a computer system reads pixel information from a frame buffer to generate a video output signal. However, the video output system must often compete with other memory users in order to access a frame buffer in a shared memory system. When memory bandwidth resources are limited, the performance of a computer system will suffer. To reduce the performance drop, a dynamic color mode switching system has been introduced. The dynamic color mode switching system detects when memory bandwidth resources are limited and then instructs the video output system to switch to a color mode that reduces the amount of reads from the memory system without any user intervention.

Claims (30)

1 . A digital video display system, said digital video display system comprising:

a first memory buffer, said first memory buffer comprising a set of most significant bits for a set of pixels;

a second memory buffer, said second memory buffer comprising a set of least significant bits for said set of pixels;

a video output generator, said video output generator for reading pixel data from said memory buffers and generating video output; and

a resource monitor, said resource monitor instructing said video output generator to read from said first memory buffer and said second memory buffer when high quality video is desired, and said resource monitor instructing said video output generator to read from said first memory buffer but not said second memory buffer when memory resources are scarce.

2 . The digital video display system of claim 1 , said digital video display system further comprising a plurality of resource reporting units, each of said resource reporting units providing resource usage information to said resource monitor.

3 . The digital video display system of claim 1 , said digital video display system further comprising a frame buffer splitter, said frame buffer splitter converting a unified frame buffer into said first memory buffer and said second memory buffer.

4 . The digital video display system of claim 1 , wherein said first memory buffer comprises a High-Color frame buffer.

5 . The digital video display system of claim 4 , wherein said set of least significant bits of said second memory buffer are combinable with said set of most significant bits of said High-Color frame buffer to form a set of complete True-Color pixel information.

6 . The digital video display system of claim 4 , wherein said set of least significant bits of said second memory buffer comprises a set of averaged least significant bits, said set of average least significant bits being combinable with said set of most significant bits of said High-Color frame buffer to form a set of pseudo True-Color pixel information.

7 . The digital video display system of claim 1 , wherein said first memory buffer and said second memory buffer are part of a shared memory system.

8 . The digital video display system of claim 7 , wherein an input/output subsystem uses said shared memory system.

9 . A method of reading pixel information in a computer system, said method comprising:

detecting a memory resource usage in said computer system with a resource monitor;

reading pixel information from both a first memory buffer comprising a set of most significant bits for a set of pixels and a second memory buffer comprising a set of least significant bits for said set of pixels when said memory resource usage is low; and

reading pixel information from only from said first memory buffer when said memory resource usage is high.

10 . The method of reading pixel information in a computer system of claim 9 , said method further comprising receiving memory usage information from a plurality of resource reporting units in said resource monitor.

11 . The method of reading pixel information in a computer system of claim 9 , said method further comprising converting a unified frame buffer into said first memory buffer and said second memory buffer.

12 . The method of reading pixel information in a computer system of claim 9 , wherein said first memory buffer comprises a High-Color frame buffer.

13 . The method of reading pixel information in a computer system of claim 12 , wherein said set of least significant bits of said second memory buffer are combinable with said set of most significant bits of said High-Color frame buffer to form a set of complete True-Color pixel information.

14 . The method of reading pixel information in a computer system of claim 12 , wherein said set of least significant bits of said second memory buffer comprises a set of averaged least significant bits, said set of averaged least significant bits being combinable with said set of most significant bits of said High-Color frame buffer to form a set of pseudo True-Color pixel information.

15 . The method of reading pixel information in a computer system of claim 9 , wherein said first memory buffer and said second memory buffer are part of a shared memory system.

16 . The method of reading pixel information in a computer system of claim 15 , wherein an input/output subsystem uses said shared memory system.

17 . A method of reading pixel information in a computer system, said method comprising:

detecting a memory resource usage in said computer system with a resource monitor;

reorganizing a high-quality frame buffer into a lower-quality frame buffer when said memory resource usage is high; and

reorganizing said lower-quality frame buffer into said high-quality frame buffer when said memory resource usage is low.

18 . The method of reading pixel information in a computer system of claim 17 , said method further comprising receiving memory usage information from a plurality of resource reporting units in said resource monitor.

19 . The method of reading pixel information in a computer system of claim 17 , wherein said high-quality frame buffer comprises a True-Color frame buffer.

20 . The method of reading pixel information in a computer system of claim 17 , wherein said frame buffers are part of a shared memory system that is shared with other subsystems in said computer system.

Assignments (4)
CORRECTIVE ASSIGNMENT TO CORRECT THE ADDRESS OF ASSIGNEE PREVIOUSLY RECORDED AT REEL: 030390 FRAME: 0535. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Nov 6, 2015
From: NCOMPUTING, INC.
To: ARES CAPITAL CORPORATION
Reel/Frame 037058/0390 →
SECURITY AGREEMENT Recorded Feb 6, 2014
From: NCOMPUTING, INC., A DELAWARE CORPORATION; NCOMPUTING, INC., A CALIFORNIA CORPORATION
To: PINNACLE VENTURES, L.L.C.
Reel/Frame 032166/0456 →
SECURITY AGREEMENT Recorded May 9, 2013
From: NCOMPUTING, INC.
To: ARES CAPITAL CORPORATION
Reel/Frame 030390/0535 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 21, 2011
From: MAU, FRANCO EULOGIO; PARK, SANGYONG; CHOWDHRY, ANITA
To: NCOMPUTING INC.
Reel/Frame 025677/0773 →