Image processor and method of image rotation
View Patent ↗A method of rotating a digital image includes performing a first pass to process a selected image tile of a source image. The first pass includes copying a set of pixels of the selected image tile from a first memory to a processor memory, where the set of pixels comprises a portion of the selected image tile. The first pass further includes grouping the set of pixels into blocks of pixels and writing each of the blocks of pixels to a memory location. The method further includes repeating the first pass until each of the pixels of the selected image tile is processed, performing a second pass to process the blocks of pixels, and repeating the second pass until each of the blocks of pixels is processed. The second pass includes copying blocks of pixels, regrouping the blocks of pixels, and writing the regrouped pixels to a destination image location.
1. A method of rotating a digital image using a processor, the method comprising:
performing a first pass, comprising:
copying a set of pixels from a source memory location to a first memory location, wherein the set of pixels comprises a portion of the digital image;
grouping the set of pixels into a block of pixels using the processor; and
writing the block of pixels to a temporary memory location; and
performing a second pass, comprising:
copying at least a portion of the block of pixels from the temporary memory location to a second memory location;
regrouping at least a portion of the block of pixels using the processor to form a regrouped block of pixels; and
writing the regrouped block of pixels to a destination memory location, the regrouped block of pixels comprising at least of a portion of a rotated digital image.
2. The method of claim 1 , wherein the set of pixels from the source memory location comprise a plurality of adjacent pixels in the digital image.
3. The method of claim 1 , wherein the source memory location comprises an off-chip memory location.
4. The method of claim 1 , wherein the first memory location and the second memory location are comprised in an on-chip processor memory.
5. The method of claim 1 , wherein the method further comprises:
defining a plurality of image tiles, each of the plurality of image tiles comprising a portion of the digital image; and
performing the first pass and the second pass for each of the plurality of image tiles.
6. The method of claim 5 , wherein each image tile comprises a plurality of horizontally and vertically adjacent pixels in the digital image.
7. The method of claim 1 , wherein writing the regrouped blocks to a destination memory location comprises writing to a plurality of consecutive memory locations in the destination memory location.
8. A method of rotating a digital image using a processor, the method comprising:
generating a plurality of image tiles using the processor, each image tile comprising a plurality of horizontally and vertically adjacent pixels in the digital image;
selecting one of the plurality of image tiles;
performing a first pass, comprising:
copying at least a first row of pixels and a second row of pixels from the selected image tile;
grouping at least a portion of pixels from the first row of pixels and the second row of pixels into a matrix of pixels;
writing the block of pixels to a temporary memory location;
performing a second pass, comprising:
copying the block of pixels from the temporary memory location;
regrouping the selected blocks to form a portion of the rotated image;
writing the regrouped blocks to a destination memory location; and
successively selecting each of the plurality of image tiles and performing the first pass and the second pass to generate a rotated digital image.
9. A method of claim 8 , wherein regrouping the selected blocks to form the portion of the rotated image further comprises regrouping adjacent pixels in the rotated digital image.
10. The method of claim 8 , wherein writing the regrouped blocks to a destination memory location comprises writing to a plurality of consecutive memory locations in the destination memory location.
11. A system, comprising:
a processor configured to perform:
a first pass to copy a set of pixels of a digital image from a source memory location to a first memory location, wherein the set of pixels comprises a portion of the digital image, to group the set of pixels into a block of pixels, to write the block of pixels to a temporary memory location; and
a second pass to copy at least a portion of the block of pixels from the temporary memory location to a second memory location, to regroup at least a portion of the block of pixels to form a regrouped block of pixels, and to write the regrouped block of pixels to a destination memory location, the regrouped block of pixels comprising at least a portion of a rotated digital image.
12. The system of claim 11 , further comprising an on-chip processor memory, and wherein the processor memory comprises the first memory location and the second memory location.
13. The system of claim 11 , further comprising an off-chip memory, and wherein the off-chip memory comprises the source memory location and the destination memory location.
14. The system of claim 13 , wherein the off-chip memory further comprises the temporary memory location.
15. The system of claim 11 , wherein the regrouped blocks are written to consecutive memory locations in the destination memory location.
16. The system of claim 11 , wherein the processor is further configured to define a plurality of image tiles, each of the plurality of image times comprising a portion of the digital image and to perform the first pass and the second pass for each of the plurality of image tiles.
17. A non-transitory processor-readable medium comprising program code for causing a processor to perform a method to rotate a source digital image, the method comprising:
performing a first pass, comprising:
copying a set of pixels from a source memory location to a first memory location, wherein the set of pixels comprises a portion of the source digital image;
grouping the set of pixels into a block of pixels using the processor; and
writing the block of pixels to a temporary memory location; and performing a second pass, comprising:
copying at least a portion of the block of pixels from the temporary memory location to a second memory location;
regrouping at least a portion of the block of pixels using the processor to form a regrouped block of pixels; and
writing the regrouped block of pixels to a destination memory location, the regrouped block of pixels comprising at least of a portion of a rotated digital image.
18. The non-transitory processor-readable medium of claim 17 , wherein the set of pixels from the source memory location comprise a plurality of adjacent pixels in the digital image.
19. The non-transitory processor-readable medium of claim 17 , wherein the source memory location comprises an off-chip memory location.
20. The non-transitory processor-readable medium of claim 17 , wherein the first memory location and the second memory location are comprised in an on-chip processor memory.
21. The non-transitory processor-readable medium of claim 17 , further comprising program code for causing the processor to perform a method, comprising:
defining a plurality of image tiles comprising a portion of the digital image; and
performing the first pass and the second pass for each of the plurality of image tiles.
22. The non-transitory processor-readable medium of claim 17 , wherein each image tile comprises a plurality of horizontally and vertically adjacent pixels in the digital image.
23. The non-transitory processor-readable medium of claim 17 , wherein the regrouped blocks are written to a plurality of consecutive memory locations in the destination memory location.