IP Library Granted Patent US 8,675,138
Granted Patent B2
US 8,675,138 · App. 13/013,421 · Granted Mar 18, 2014

Method and apparatus for fast source switching and/or automatic source switching

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Quick Facts
Patent No.
US 8,675,138
App. No.
13/013,421
Granted
Mar 18, 2014
Kind
B2
Abstract

A method and system are provided in which a processor may perform fast source switching and/or automatic source switching by keeping active the signals from multiple sources. The processor may determine which received video signals are locked-in within a front-end portion of the processor. A video signal may be locked-in when a demodulator is locked to a carrier in the video signal or when a decoder is programmed to decode the video signal. During operation, the processor may switch from processing a current video signal to processing a video signal selected from those determined to be locked-in. The processor may maintain active a portion of a back-end portion of the processor to handle the switch from the current video signal to the selected video signal. The processor may switch to process between video signals when a predetermined content and/or metadata is detected within one of the video signals.

Claims (60)

1. A method, comprising:

determining that a plurality of video signals received by a processor are locked-in within a front-end portion of the processor, wherein each of the plurality of video signals comprises one or both of audio data and image data;

selecting one of the received plurality of video signals determined to be locked-in within the front-end portion of the processor, the selected video signal being unrouted for processing by any back-end portion of the processor when selected; and

switching from processing a current video signal of the received plurality of video signals in a back-end portion of the processor to processing the selected video signal in the back-end portion of the processor.

2. The method according to claim 1 , comprising maintaining active at least a portion of the back-end portion of the processor that is operable to handle content from each of the received plurality of video signals determined to be locked-in within the front-end portion of the processor.

3. The method according to claim 1 , wherein a video signal of the received plurality of video signals is locked-in within the front-end portion of the processor when a demodulator in the front-end portion of the processor is locked to a carrier in the video signal.

4. The method according to claim 1 , wherein a video signal of the received plurality of video signals is locked-in within the front-end portion of the processor when a decoder is programmed to decode the video signal.

5. The method according to claim 1 , wherein a video signal of the received plurality of video signals comprises one of:

a composite, blanking, and sync (CVBS) signal; a separate video (S-video) signal;

a high-definition multimedia interface (HDMI) signal;

a component signal;

a personal computer (PC) signal;

a source input format (SIF) signal; or

a red, green, blue (RGB) signal.

6. A method for processing signals, comprising:

determining that a plurality of video signals received by a processor are locked-in within a front-end portion of the processor, wherein each of the plurality of video signals comprises one or both of audio data and image data;

selecting one of the received plurality of video signals determined to be locked-in within the front-end portion of the processor, the selected video signal being unprocessed by a back-end portion of the processor;

automatically detecting, when processing a current video signal of the received plurality of video signals in the back-end portion of the processor, a predetermined content within the current video signal; and

upon detection of the predetermined content within the current video signal, switching from processing the current video signal in the back-end portion of the processor to processing the selected video signal in the back-end portion of the processor.

7. The method according to claim 6 , wherein:

the current video signal is associated with a first video for display in a picture-in-picture format; and

the selected video signal is associated with a second video for display in the picture-in-picture format.

8. The method according to claim 6 , comprising:

automatically detecting, when processing the selected video signal, a predetermined content within the selected video signal; and

upon detection of the predetermined content within the selected video signal, switching back to processing the current video signal in the back-end portion of the processor.

9. The method according to claim 1 , wherein:

the front-end portion of the processor comprises a first portion and a second portion that is separate from the first portion; and

the first portion is operable to lock to the current video signal and the second portion is operable to lock to the selected video signal.

10. The method according to claim 9 , wherein:

the first portion of the front-end portion of the processor is an HDMI front-end; and

the second portion of the front-end portion of the processor is a radio frequency (RF) front-end.

11. A system, comprising:

a processor comprising a front-end portion and a back-end portion;

the processor is operable to determine that a plurality of video signals received are locked-in within the front-end portion of the processor, wherein each of the plurality of video signals comprises one or both of audio data and image data;

the processor is operable to select one of the received plurality of video signals determined to be locked-in within the front-end portion of the processor, the selected video signal being unrouted for processing in any portion of the back-end portion of the processor when selected; and

the processor is operable to switch from processing a current video signal of the received plurality of video signals in the back-end portion of the processor to processing the selected video signal in the back-end portion of the processor.

12. The system according to claim 11 , wherein the processor is operable to maintain active at least a portion of the back-end portion of the processor that is operable to handle content from each of the received plurality of video signals determined to be locked-in within the front-end portion of the processor.

13. The system according to claim 11 , wherein the processor is operable to lock to a video signal of the received plurality of video signals within the front-end portion of the processor when a demodulator in the front-end portion of the processor is locked to a carrier in the video signal.

14. The system according to claim 11 , wherein the processor is operable to lock to a video signal of the received plurality of video signals within the front-end portion of the processor when a decoder is programmed to decode the video signal.

15. The system according to claim 11 , wherein a video signal of the received plurality of video signals comprises one of:

a composite, blanking, and sync (CVBS) signal;

a separate video (S-video) signal;

a high-definition multimedia interface (HDMI) signal;

a component signal;

a personal computer (PC) signal;

a source input format (SIF) signal; or

a red, green, blue (RGB) signal.

16. The system according to claim 11 , wherein the processor is operable to:

automatically detect, when processing the current video signal, a predetermined content within the current video signal; and

upon detection of the predetermined content within the current video signal, switch from processing the current video signal in the back-end portion of the processor to processing the selected video signal in the back-end portion of the processor.

17. The system according to claim 16 , wherein:

the current video signal is associated with a first video for display in a picture-in-picture format; and

the selected video signal is associated with a second video for display in the picture-in-picture format.

18. The system according to claim 16 , wherein the processor is operable to:

automatically detect, when processing the selected video signal, a predetermined content within the selected video signal; and

upon detection of the predetermined content within the selected video signal, switch back to processing the current video signal in the back-end portion of the processor.

19. The system according to claim 11 , wherein:

the front-end portion of the processor comprises a first portion and a second portion that is separate from the first portion; and

the first portion is operable to lock to the current video signal and the second portion is operable to lock to the selected video signal.

20. The system according to claim 11 , wherein the received plurality of video signals comprises N video signals, the back-end portion of the processor comprises M back-end portions, and the processor further comprises a switching matrix capable of routing a subset of the N video signals for processing by the M back-end portions of the processor, M being less than N.

Assignments (7)
CORRECTIVE ASSIGNMENT TO CORRECT THE ERROR IN RECORDING THE MERGER IN THE INCORRECT US PATENT NO. 8,876,094 PREVIOUSLY RECORDED ON REEL 047351 FRAME 0384. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 8, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 049248/0558 →
CORRECTIVE ASSIGNMENT TO CORRECT THE EFFECTIVE DATE OF THE MERGER PREVIOUSLY RECORDED AT REEL: 047230 FRAME: 0910. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Oct 29, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047351/0384 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047230/0910 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: BROADCOM CORPORATION
Reel/Frame 041712/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 1, 2017
From: BROADCOM CORPORATION
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041706/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: BROADCOM CORPORATION
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037806/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 23, 2011
From: ARORA, GAURAV; JAGMAG, ADIL
To: BROADCOM CORPORATION
Reel/Frame 026007/0359 →