IP Library Granted Patent US 8,084,334
Granted Patent B2
US 8,084,334 · App. 13/017,747 · Granted Dec 27, 2011

Semiconductor device manufacturing method comprising a metal pattern and laser modified regions in a cutting region

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,084,334
App. No.
13/017,747
Granted
Dec 27, 2011
Kind
B2
Abstract

To divide a semiconductor wafer by stealth dicing, a test pad in a cutting region and an alignment target are collectively arranged along one side in a width direction of the cutting region, and a laser beam for forming a modified region is irradiated to a position away in plane from the test pad and the alignment target Am. In this manner, defects in cutting shape in a cutting process of a semiconductor wafer using stealth dicing can be reduced or prevented.

Claims (14)

1. A method of manufacturing a semiconductor device, comprising the steps of:

(a) providing a semiconductor wafer having a substrate including a front surface, an interlayer insulating film formed on the front surface of the substrate, a first chip region formed over the front surface of the substrate, a second chip region formed over the front surface of the substrate and arranged next to the first chip region, a cutting region formed over the front surface of the substrate and formed between the first chip region and the second chip region in a plan view, a metal pattern formed over the front surface of the substrate and formed in the cutting region in the plan view and arranged between the first chip region and the second chip region in the plan view, and a back surface opposite to the front surface,

wherein the interlayer insulating film has a wiring layer and a low-dielectric constant film,

wherein the substrate is comprised of a silicon, and

wherein the low-dielectric constant film is more brittle than the substrate;

(b) after the step (a), removing the metal pattern by running a dicing saw along the cutting region;

(c) after the step (b), attaching a back grind (BG) tape to the front surface of the semiconductor wafer, and grinding the back surface of the semiconductor wafer;

(d) after the step (c), forming a modified region in the cutting region of the semiconductor wafer by irradiating along the cutting region with a laser; and

(e) after the step (d), attaching a dicing tape to the back surface of the semiconductor wafer, and removing the back grind (BG) tape from the semiconductor wafer;

(f) after the step (e), separating the first chip region from the second chip region by expanding the dicing tape attached to the back surface of the semiconductor wafer.

2. The method according to claim 1 , wherein in the step (b), the metal pattern and a portion of the interlayer insulating film are removed by running the dicing saw.

3. The method according to claim 1 , wherein the low-dielectric constant film is comprised of one of an organic polymer and organic silica glass.

4. The method according to claim 1 , wherein in the step (d), the modified region is formed into the substrate.

5. The method according to claim 1 , wherein in the step (d), the laser is irradiated from the back surface of the semiconductor wafer.

Assignments (1)
CHANGE OF ADDRESS Recorded Nov 29, 2017
From: RENESAS ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 044928/0001 →
Priority Claims (1)
WO PCT/JP2005/020615 · Nov 10, 2005 · international
Continuity (2)
Continuation 12092850
Related Publication 20110124180A1 · May 26, 2011