Granted Patent B2

US 8,327,112 · App. 13/018,492 · Granted Dec 4, 2012

Abstract

Claims (33)

1. A processing system comprising:

a page table including a plurality of page table entries, where each of the plurality of page table entries includes information for translating a virtual address page to a corresponding physical address page;

a translation lookaside buffer adapted to cache page table information; and

memory management software responsive to changes in the page table to consolidate a run of contiguous page table entries into one or more page table entries having a larger memory page size, Y, and where the memory management software further determines whether the run of contiguous page table entries may be cached in an entry of the translation lookaside buffer that caches multiple page table entries, X, in a single translation lookaside buffer entry.

2. The processing system of claim 1 , where the memory management software updates the entry of the translation lookaside buffer using the larger memory page size, Y, if the memory management software determines that the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer.

3. The processing system of claim 1 , where the memory management software consolidates the run of contiguous page table entries based on access permissions for the run of contiguous page table entries.

4. The processing system of claim 1 , where the memory management software determines whether the run of contiguous page table entries can support a memory page size of X*Y pursuant to determining whether the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer.

5. The processing system of claim 1 , where the memory management software determines whether a virtual address corresponding to the run of contiguous page table entries is a multiple of Z pursuant to determining whether the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer, where Z=X*Y.

6. The processing system of claim 1 , where the memory management software consolidates the run of contiguous page table entries based on memory boundary conditions for the run of contiguous page table entries.

7. The processing system of claim 1 , where the memory management software organizes the page table entries of the page table so that consecutive page table entries may be accessed to fill a single translation lookaside buffer entry.

8. The processing system of claim 1 , where the memory management software comprises translation lookaside miss software, where the translation lookaside miss software accesses consecutive page table entries to fill a single translation lookaside buffer entry, and where the number of consecutive page table entries is equal to X.

9. The processing system of claim 1 , where X=2.

10. The processing system of claim 1 , where the translation lookaside buffer comprises a plurality of translation lookaside buffer entries that each cache a different number of page table entries in a single translation lookaside buffer entry.

11. A memory management system comprising:

a physical memory comprising memory management software, where the memory management software comprises:

page table management software adapted to manage a page table including a plurality of page table entries, where each of the plurality of page table entries includes information for translating a virtual address page to a corresponding physical address page;

translation lookaside buffer management software adapted to manage a translation lookaside buffer; and

memory page size management software responsive to changes in the page table to consolidate a run of contiguous page table entries into one or more page table entries having a larger memory page size, Y, and where the memory page size management software further determines whether the run of contiguous page table entries may be cached in an entry of the translation lookaside buffer that caches multiple page table entries, X, in a single translation lookaside buffer entry.

12. The memory management system of claim 11 , where the translation lookaside buffer management software updates the entry of the translation lookaside buffer using the larger memory page size, Y, if the memory page size management software determines that the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer.

13. The memory management system of claim 11 , where the memory page size management software consolidates the run of contiguous page table entries based on access permissions for the run of contiguous page table entries.

14. The memory management system of claim 11 , where the memory page size management software determines whether the run of contiguous page table entries can support a memory page size of X*Y pursuant to determining whether the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer.

15. The memory management system of claim 11 , where the memory page size management software determines whether a virtual address corresponding to the run of contiguous page table entries is a multiple of Z pursuant to determining whether the run of contiguous page table entries may be cached in the entry of the translation lookaside buffer, where Z=X*Y.

16. The memory management system of claim 11 , where the memory page size management software consolidates the run of contiguous page table entries based on memory boundary conditions for the run of contiguous page table entries.

17. The memory management system of claim 11 , where the memory page size management software organizes the page table entries of the page table so that consecutive page table entries may be accessed to fill a single translation lookaside buffer entry.

18. The memory management system of claim 11 , further comprising translation lookaside miss software, where the translation lookaside miss software accesses consecutive page table entries to fill a single translation lookaside buffer entry, and where the number of consecutive page table entries is equal to X.

19. A method for managing memory of a processing system comprising:

detecting a change in a page table including a plurality of page table entries, where each of the plurality of page table entries includes information for translating a virtual address to a corresponding physical address;

responding to the detection by identifying a run of contiguous page table entries having substantially the same access permission information; and

analyzing the run of contiguous page table entries to determine whether the run of contiguous page table entries may be consolidated using a larger memory page size, Y, and whether the run of contiguous page table entries may be consolidated for caching in an entry of a translation lookaside buffer that caches multiple page table entries, X, in a single translation lookaside buffer entry.

20. The method of claim 19 , where the analysis comprises determining whether the run of contiguous page table entries can support a larger page size of X*Y.

21. The method of claim 19 , where the analysis comprises determining whether a virtual address corresponding to the run of contiguous page table entries is a multiple of Z pursuant to determining whether the run of contiguous page table entries may be cached in an entry of the translation lookaside buffer, where Z=X*Y.

22. The method of claim 19 , where the memory page size management software consolidates the run of contiguous page table entries based on memory boundary conditions for the run of contiguous page table entries.

23. The method of claim 19 , where the memory page size management software consolidates the run of contiguous page table entries based on access permissions for the run of contiguous page table entries.

Assignments (9)