RAM Based Security Element for Embedded Applications
An integrated circuit includes a demodulator for receiving an encrypted message and a hardware unit coupled to the demodulator and configured to enable the demodulator to decrypt the received message. The hardware unit includes a processing unit, a read-only access memory (ROM) having a boot code causing the integrated circuit to fetch data from an external memory, a random access memory (RAM) for storing the fetched data, multiple non-volatile memory registers or fuses, and an interface unit configured to write the data stored in the RAM to an external storage in response to a backup event. The data may be encrypted using an encryption key prior to being written to the external storage. The interface unit may include a direct memory access controller. The external memory and the external storage can be a same non-volatile memory, namely a Flash device.
1 . An integrated circuit comprising:
a demodulator for receiving an encrypted content; and
a hardware unit communicatively coupled to the demodulator, the hardware unit comprising:
a processing unit;
a read-only access memory comprising a boot code adapted to cause the integrated circuit to fetch data from an external memory;
a random access memory adapted to store the fetched data and provide the stored data to the processing unit for execution;
a plurality of non-volatile memory registers or fuses; and
an interface unit adapted to provide the data stored in the random access memory to an external storage in response to a backup event.
2 . The integrated circuit of claim 1 , wherein the external storage comprises a flash memory.
3 . The integrated circuit of claim 1 , wherein the interface unit comprises a direct memory access controller circuit.
4 . The integrated circuit of claim 1 , wherein the hardware unit enables the demodulator to decrypt the encrypted content.
5 . The integrated circuit of claim 1 , wherein the provided data to the external storage are encrypted using an encryption key generated in accordance with an encryption algorithm.
6 . The integrated circuit of claim 5 , wherein the encryption key is generated using a unique code of the integrated circuit and a seed number.
7 . The integrated circuit of claim 6 , wherein the unique code is stored in one of the plurality of non-volatile registers or fuses.
8 . The integrated circuit of claim 6 , wherein the seed number is a random number.
9 . The integrated circuit of claim 5 , wherein the encryption key is dynamically generated.
10 . The integrated circuit of claim 1 , wherein the backup event occurs in timed intervals.
11 . The integrated circuit of claim 1 , wherein the backup event is triggered by a power-off condition.
12 . The integrated circuit of claim 1 , wherein the backup event is triggered when a modification in a content of the random access memory is detected.
13 . A data processing device having a random access memory (RAM) based security element coupled to a demodulator adapted to receive encrypted information, the data processing device performing a method comprising:
receiving data from a first external memory, the data being adapted to enable the demodulator to decrypt the encrypted information;
storing the received data in the random access memory disposed in the security element;
determining whether the device has a backup condition and, in the event that the device has a backup condition,
encrypting the data stored in the random access memory; and
outputting the encrypted data to a second external memory.
14 . The method of claim 13 further comprising authenticated the data stored in the random access memory.
15 . The method of claim 13 , wherein the encrypting comprises an encryption key generated in accordance with an encryption algorithm.
16 . The method of claim 15 , wherein the encryption key is generated using a unique code and a seed number, the unique code being stored in a non-volatile memory register disposed in the security element and the seed number being generated by a random number generator disposed in the security element.
17 . The method of claim 15 , wherein the encryption key is dynamically generated.
18 . The method of claim 13 , wherein the backup condition is triggered by a power down event.
19 . The method of claim 13 , wherein the first external memory and the second external memory are a same flash memory.
20 . The method of claim 13 , wherein the act of outputting comprises the use of a direct memory access controller.
21 . A device having a random access memory (RAM) based security element storing a computer program to process digital television signals, the computer program causing the device to perform steps comprising:
encrypting the computer program stored in the random access memory disposed in the security element; and
writing the encrypted computer program to an external memory in response to a backup event.
22 . The device of claim 21 , wherein the backup event is user driven or triggered by a power-off condition.