Method for fabricating a monolithic integrated composite group III-V and group IV semiconductor device
View Patent ↗According to one disclosed embodiment, a monolithic vertically integrated composite device comprises a double sided semiconductor substrate having first and second sides, a group IV semiconductor layer formed over the first side and comprising at least one group IV semiconductor device, and a group III-V semiconductor body formed over the second side and comprising at least one group III-V semiconductor device electrically coupled to the at least one group IV semiconductor device. The composite device may further comprise a substrate via and/or a through-wafer via providing electric coupling. In one embodiment, the group IV semiconductor layer may comprise an epitaxial silicon layer, and the at least one group IV semiconductor device may be a combined FET and Schottky diode (FETKY) fabricated on the epitaxial silicon layer. In one embodiment, the at least one group III-V semiconductor device may be a III-nitride high electron mobility transistor (HEMT).
1. A method for fabricating a monolithic integrated composite device, said method comprising:
providing a semiconductor substrate having first and second sides;
forming a group IV semiconductor layer over said first side after said providing of said semiconductor substrate;
forming a group III-V semiconductor body over said second side;
processing said group IV semiconductor layer to produce at least one group IV semiconductor device;
processing said group III-V semiconductor body to produce an at least one group III-V semiconductor device;
electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device;
wherein said semiconductor substrate is situated between said group IV semiconductor layer and said group III-V semiconductor body.
2. The method of claim 1 , wherein said forming said group IV semiconductor layer over said first side comprises epitaxially growing said group IV semiconductor layer.
3. The method of claim 1 , wherein said electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device comprises forming a substrate via in said monolithic integrated composite device.
4. The method of claim 1 , wherein said electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device comprises forming a through-wafer via in said semiconductor substrate.
5. The method of claim 1 , wherein said forming said group IV semiconductor layer over said first side comprises forming a silicon layer.
6. The method of claim 1 , wherein said forming said group III-V semiconductor body over said second side comprises forming at least one III-nitride layer.
7. The method of claim 1 , wherein said forming said group III-V semiconductor body over said second side comprises forming a heterojunction at an interface of a gallium nitride (GaN) layer and an aluminum gallium nitride (AlGaN) layer.
8. The method of claim 1 , wherein said processing said group III-V semiconductor body to produce said at least one group III-V semiconductor device produces at least one high electron mobility transistor (HEMT).
9. The method of claim 1 , wherein said processing said group IV semiconductor layer to produce said at least one group IV semiconductor device produces a FETKY including a field-effect transistor (FET) and a Schottky diode.
10. The method of claim 1 , wherein said method is practiced at a temperature below 950° C.
11. A method for fabricating a monolithic integrated composite device, said method comprising:
providing a semiconductor substrate having first and second sides;
producing at least one group IV semiconductor device on said first side after said providing of said semiconductor substrate;
producing at least one group III-V semiconductor device on said second side;
electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device.
12. The method of claim 11 , wherein said electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device comprises forming a substrate via in said monolithic integrated composite device.
13. The method of claim 11 , wherein said electrically coupling said at least one group III-V semiconductor device to said at least one group IV semiconductor device comprises forming a through-wafer via in said semiconductor substrate.
14. The method of claim 11 , wherein said least one group IV semiconductor device comprises a silicon device.
15. The method of claim 11 , wherein said at least one group III-V semiconductor device comprises a III-nitride device.
16. The method of claim 15 , wherein said III-nitride device comprises an aluminum gallium nitride (AlGaN) layer formed over a gallium nitride (GaN) layer.
17. The method of claim 15 , wherein said III-nitride device is a high electron mobility transistor (HEMT).
18. The method of claim 11 , wherein said at least one group IV semiconductor device comprises a FETKY including a field-effect transistor (FET) and a diode.
19. The method of claim 18 , wherein said diode is a Schottky diode.
20. The method of claim 11 , wherein said method is practiced at a temperature below 950° C.