IP Library Granted Patent US 8,158,477
Granted Patent B2
US 8,158,477 · App. 13/031,712 · Granted Apr 17, 2012

Method for forming a pixel of an electroluminescence device having storage capacitors

Assignee: AU Optronics Corporation
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Quick Facts
Patent No.
US 8,158,477
App. No.
13/031,712
Granted
Apr 17, 2012
Kind
B2
Abstract

A method for forming a pixel of an electroluminescence device includes providing a substrate; defining at least a first area for capacitors and a second area for a transistor on the substrate; forming a first conductive layer over the first area; forming a first dielectric layer over the first conductive layer; forming a second conductive layer over the first dielectric layer; forming a second dielectric layer over the second conductive layer; forming a third conductive layer over the second dielectric layer; forming a layer of capping silicon nitride between the second dielectric layer and the third conductive layer; forming a semiconductor layer over the second area; forming a gate oxide layer over the second area; and forming a fourth conductive layer over the gate oxide layer.

Claims (37)

1. A method for forming a pixel of an electroluminescence device, comprising:

providing a substrate;

defining at least a first area for capacitors and a second area for a transistor on the substrate;

forming a first conductive layer over the first area;

forming a first dielectric layer over the first conductive layer over the first area;

forming a second conductive layer over the first dielectric layer over the first area;

forming a second dielectric layer over the second conductive layer over the first area;

forming a third conductive layer over the second dielectric layer over the first area;

forming a layer of capping silicon nitride between the second dielectric layer and the third conductive layer over the first area;

forming a semiconductor layer over the second area;

forming a gate oxide layer over the second area; and

forming a fourth conductive layer over the gate oxide layer over the second area;

wherein the first conductive layer over the first area is directly connected to a power supply voltage, wherein the second conductive layer is electrically connected to the fourth conductive layer, and wherein the first conductive layer, the first dielectric layer, and the second conductive layer over the first area collectively form a first one of the capacitors over the first area, the second conductive layer, the second dielectric layer, and the third conductive layer over the first area collectively form a second one of the capacitors over the first area, and the semiconductor layer, the gate oxide layer, and the fourth conductive layer over the second area collectively form a transistor.

2. The method of claim 1 , further comprising:

forming the gate oxide over the first area;

forming the first conductive layer over the gate oxide, wherein forming the first conductive layer and forming the fourth conductive layer comprise forming the first conductive layer and the fourth conductive layer using the same material, wherein forming the first dielectric layer comprises forming a layer of interlayer dielectric (ILD), and wherein forming the second dielectric layer comprises forming a layer of passivation silicon nitride;

defining a third area for an organic light-emitting diode (OLED) on the substrate;

forming a fifth conductive layer over the third area;

forming an organic layer over the fifth conductive layer over the third area, wherein the organic layer is between the layer of capping silicon nitride and the third conductive layer over the first area; and

forming the third conductive layer over the organic layer over the third area, wherein the fifth conductive layer, the organic layer, and the third conductive layer over the third area collectively form the OLED.

3. A method for forming a pixel of an electroluminescence device, comprising:

providing a substrate;

defining at least a first area for capacitors, a second area for a transistor on the substrate and a third area for an organic light-emitting diode (OLED) on the substrate;

forming a first conductive layer over the first area;

forming a first dielectric layer over the first conductive layer over the first area;

forming a second conductive layer over the first dielectric layer over the first area;

forming a second dielectric layer over the second conductive layer over the first area;

forming a third conductive layer over the second dielectric layer over the first area;

forming a semiconductor layer over the second area;

forming a gate oxide layer over the second area;

forming a fourth conductive layer over the gate oxide layer over the second area;

forming the gate oxide over the first area;

forming the first conductive layer over the gate oxide, wherein forming the first conductive layer and forming the fourth conductive layer comprise forming the first conductive layer and the fourth conductive layer using the same material, wherein forming the first dielectric layer comprises forming a layer of interlayer dielectric (ILD), and wherein forming the second dielectric layer comprises forming a layer of passivation silicon nitride;

forming a fifth conductive layer over the third area; and

forming an organic layer over the fifth conductive layer over the third area, wherein the third conductive layer is over the organic layer over the third area, and wherein the fifth conductive layer, the organic layer, and the third conductive layer over the third area collectively form the OLED,

wherein the first conductive layer over the first area is directly connected to a power supply voltage, wherein the second conductive layer is electrically connected to the fourth conductive layer, and wherein the first conductive layer, the first dielectric layer, and the second conductive layer over the first area collectively form a first one of the capacitors over the first area, the second conductive layer, the second dielectric layer, and the third conductive layer over the first area collectively form a second one of the capacitors over the first area, and the semiconductor layer, the gate oxide layer, and the fourth conductive layer over the second area collectively form a transistor, and

wherein forming the second conductive layer and forming the fifth conductive layer comprise forming the second conductive layer and the fifth conductive layer using the same material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2023
From: AUO CORPORATION
To: OPTRONIC SCIENCES LLC
Reel/Frame 064658/0572 →
CHANGE OF NAME Recorded May 25, 2023
From: AU OPTRONICS CORPORATION
To: AUO CORPORATION
Reel/Frame 063785/0830 →
Continuity (3)
Division 11616943 · Dec 28, 2006
Division 11005648 · Dec 7, 2004
Related Publication 20110143465A1 · Jun 16, 2011